Amorphous Silicon Thin Film Transistors and Memory Devices

1985 ◽  
Vol 49 ◽  
Author(s):  
P.G. Lecomber
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Field Effect Transistors ◽  
Memory Devices ◽  
Preparation Technique ◽  
Defect States ◽  
Large Area ◽  
Silicon Thin Film ◽  
Simple Logic ◽  
Density Of Defect States

AbstractThe preparation of amorphous silicon with a low density of defect states by the glow discharge decomposition of silane and the ability to control its electrical conductivity over many orders of magnitude by the addition of phosphine or diborane to the silane, stimulated a worldwide interest in this material and in its possible applications. This paper begins with a description of the preparation technique and a brief review of some of the important properties of the material. The fabrication and characteristics of a-Si thin-film field effect transistors will be described and followed by a discussion of the applications of these devices in large area liquid crystal displays, in simple logic circuits and in addressable image sensors. Finally, the use of a-Si in memory devices will be briefly described.

The Instability Characteristics of Amorphous Silicon Thin Film Transistors with Various Interfacial and Bulk Defect States

1997 ◽  
Vol 36 (Part 1, No. 10) ◽  
pp. 6226-6229 ◽  
Author(s):  
Huang-Chung Cheng ◽  
Jun-Wei Tsai ◽  
Chun-Yao Huang ◽  
Fang-Chen Luo ◽  
Hsing-Chien Tuan
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Defect States ◽  
Silicon Thin Film

Investigation of the off-current in amorphous silicon thin film transistors for SiO2 and SiNx. gate insulators

1996 ◽  
Vol 424 ◽  
Author(s):  
Jeong Hyun Kim ◽  
Woong Sik Choi ◽  
Chan Hee Hong ◽  
Hoe Sup Soh
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Gate Insulator ◽  
Defect States ◽  
Silicon Thin Film ◽  
Pressure Chemical

AbstractThe off current behavior of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with an atmospheric pressure chemical vapor deposition (APCVD) silicon dioxide (SiO2) gate insulator were investigated at negative gate voltages. The a-Si:H TFT with SiO2 gate insulator has small off currents and large activation energy (Ea) of the off current compared to the a-Si:H TFT with SiNx gate insulator. The holes induced in the channel by negative gate voltage seem to be trapped in the defect states near the a-Si:H/SiO2 interface. The interface state density in the lower half of the band gap of a-Si:H/SiO2 appears to be much higher than that for a-Si:H/SiNx.

Amorpiious Silicon Thin Film Transistor and its Applications to Large-Area Electironics

1984 ◽  
Vol 33 ◽  
Author(s):  
H. C. Tuan
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistor ◽  
Two Dimensional ◽  
Large Area ◽  
Silicon Thin Film

ABSTRACTIn this paper, the amorphous silicon thin film transistor (a-Si:HTFT) technology is reviewed. Its applications to both one- and two-dimensional large-area devices are described. The issues related to the fabrication of TFT arrays on large-area substrates are also discussed.

Performance of Low Resistivity Electrode Prepared by Electroless Plated for Amorphous Silicon Thin-Film Transistors

2007 ◽  
Vol 561-565 ◽  
pp. 1165-1168 ◽  
Author(s):  
Chien Yie Tsay ◽  
Chung Kwei Lin ◽  
Hong Ming Lin ◽  
Shih Chieh Chang ◽  
Bor Chuan Chung
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Amorphous Silicon ◽  
Large Area ◽  
Silicon Thin Film ◽  
Adhesion Properties ◽  
Low Resistivity ◽  
N2 Atmosphere ◽  
Lift Off ◽  
Processing Steps

The TFTs array fabrication process for large-area TFT-LCD has been continuously developed for simplifying processing steps, improving performance and reducing cost in the process of mass production. In this study, the hydrogenated amorphous silicon (a-Si:H) TFTs with low resistivity electrodes , silver thin films, were prepared by using the selective deposition method that combined lift-off and electroless plated processes. This developed process can direct pattern the electrode of transistor devices without the etching process and provide ease processing steps. The as-deposited Ag films were annealed at 200 oC for 10 minutes under N2 atmosphere. The results shows that the adhesion properties can be enhanced and the resistivity has been improved from 6.0 μ,-cm, significantly decrease by 35%, of as-deposited Ag films by annealed. The thickness of Ag thin film is about 100 nm and the r. m. s roughness value is 1.54 nm. The a-Si:H TFT with Ag thin films as source and drain electrodes had a field effect mobility of 0.18 cm2/Vs, a threshold voltage of 2.65 V, and an on/off ratio of 3×104.

Simulation and Design of Amorphous Silicon Thin-Film Transistors for Driving Color Detectors

2000 ◽  
Vol 609 ◽  
Author(s):  
D. Caputo ◽  
L. Colalongo ◽  
F. Irrera ◽  
F. Lemmi ◽  
F. Palma
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistor ◽  
Red Light ◽  
The Self ◽  
Integration Time ◽  
Large Area ◽  
Silicon Thin Film ◽  
Self Bias ◽  
Blue Radiation

ABSTRACTPractical use of amorphous silicon stacked-junction color detectors in large-area arrays requires periodic readout of the photo-charge stored in the capacitance of the device by a transient technique of sensing. In any stacked-junction devices, color information is obtained by the “self-biasing” process: during an integration time, the three junctions independently lose charge; during the readout pulse, the capacitances of the three junctions in electrical series are re-charged. Equilibrium is reached after a few cycles, when the charge integrated in a cycle by each junction is the same, and equals the readout charge. The amount of charge is determined by the reverse biased junction and accounts for the light intensity.Dimensioning the amorphous silicon Thin Film Transistor (TFT) used as a pixel switch for the detector is a critical part of the project of a color imager. The actual design determines the self-bias process duration and the readout accuracy. The typical large thickness difference between the detector junctions makes the constraints for the switching process extremely demanding: since a greater capacitance is expected in the thinner top junction detecting blue radiation, the on-resistance must be reduced. Since the front junction does not ensure full rejection of green and red light, a calculation must be performed to extract the information on blue radiation. This requires further precision in the readout process.In this work we present a simulation study of the self-biasing process. Both a-Si:H TFT and the a-Si:H p-i-n-i-p two-color detectors are simulated by a finite-elements two-dimensional simulator ensuring a correct modeling of both the devices. Simulations allow to study in detail the timing and the accuracy of the self-biasing process. Including electrostatic capacitance and trapped charge, a set of design rules for the TFT is achieved in terms of on-state design. Similar considerations can be extended to the case of ATCD three-color detectors.

Amorphous Silicon Thin Film Transistors on Kapton Fibers

2002 ◽  
Vol 736 ◽  
Author(s):  
Eitan Bonderover ◽  
Sigurd Wagner ◽  
Zhigang Suo
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Plasma Etching ◽  
Thin Film Transistors ◽  
Textile Industry ◽  
Chemical Vapor ◽  
Electrical Characteristics ◽  
Large Area ◽  
Silicon Thin Film ◽  
Gold Contact

ABSTRACTThe textile industry uses weaving to create very large quantities of fabric very quickly. The goal of our research is to use this well established technology to create complex large-area circuits quickly and efficiently. In our laboratory we have previously shown that amorphous silicon (a-Si) can be used to make thin-Film transistors (TFTs) on Kapton (a highly temperature-resistant polyimide from DuPont). We also previously showed that these TFTs can survive mechanical loads. A process has been designed to make “TFT fibers” by fabricating a-Si TFTs on Kapton. A special TFT geometry has also been developed. The structure consists of 3 large gold contact pads – one for each terminal of the TFT – running along the fiber. These contact pads allow connections to be made between TFT fibers using conductor fibers – Kapton fibers coated only with gold. The TFT fabrication process is based on a low temperature (150°C) Plasma Enhanced Chemical Vapor Deposition (PECVD) process. The TFTs are fabricated on a Kapton sheet from which flat fibers are made by the slit film technique. So far the best method for cutting a Kapton sheet into fibers has been plasma etching. We will describe the electronic characteristics of these TFTs as well as the electrical characteristics of the contacts between TFT fibers.

Stability of Amorphous Silicon Thin Film Transistors for Analog Circuit Applications

1997 ◽  
Vol 467 ◽  
Author(s):  
R. I. Hornsey ◽  
T. Mahnke ◽  
P. Madeira ◽  
K. Aflatooni ◽  
A. Nathan
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Threshold Voltage ◽  
Analog Circuits ◽  
Thin Film Transistors ◽  
Reverse Bias ◽  
Analog Circuit ◽  
Large Area ◽  
Silicon Thin Film ◽  
Threshold Voltages

ABSTRACTAnalog circuits using amorphous silicon thin film transistors offer significant advantages for in situ signal processing in large-area optical and x-ray imagers. However such circuits are susceptible to gate-bias-induced shifts in the threshold voltages of the constituent transistors. In this work, the change of threshold voltage for devices undergoing cycles of stress, relaxation and reverse bias is measured in order to determine the feasibility of resetting the threshold voltage electrically. It is concluded that, although the reverse bias does assist the recovery of the threshold voltage, the process is still not sufficiently rapid. An analog amplifier circuit is then described which uses negative feedback to achieve a gain that is stable to within 6% over a period of 8 hours.

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