Solution Grown Polysilicon for Flat Panel Displays

1996 ◽  
Vol 424 ◽  
Author(s):  
R. L. Wallace ◽  
W. A. Anderson
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Carrier Mobility ◽  
Carrier Lifetime ◽  
Electron Cyclotron Resonance ◽  
Low Cost ◽  
Flat Panel Displays ◽  
Flat Panel ◽  
Resonance Properties ◽  
Si Films

AbstractThin-film poly-Si on low-cost substrates is useful for thin-film transistors in flat panel displays or for photovoltaics. The films reported herein were formed at 600°C by d.c. magnetron sputtering from a Si-target onto a SiO2/Mo substrate, pre-coated with Sn or In/Ti to give a liquid phase growth. Poly-Si films have given a preferred (111) orientation, grain size up to 20μm, a carrier mobility exceeding 100cm2/Vs and carrier lifetime of 8μs when using the Sn pre-layer. The Sn pre-layer typically gave smaller grain size than did the In/Ti solvent but the latter gave lower carrier lifetime from Ti incorporation in the film. The film from the Sn pre-layer gave carrier mobility of 140cm2/V-s after hydrogenation by microwave electron cyclotron resonance. Properties of the Si thin-film can be controlled by type of pre-layer, doping of the target, substrate temperature and deposition environment.

Thin-Film Transistors Fabricated With Poly-Si Films Crystallized by Microwave Annealing

1998 ◽  
Vol 508 ◽  
Author(s):  
YongWoo Choi ◽  
JeongNo Lee ◽  
TaeWoong Jang ◽  
ByungTae Ahn
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Thin Film Transistors ◽  
Solid Phase ◽  
Low Cost ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Microwave Annealing ◽  
Si Films ◽  
Better Than

AbstractSolid phase crystallization has the advantages of low cost and excellent uniformity but the crystallization temperature is too high to use glass as a substrate. Using microwave annealing, we crystallized a-Si films at 550 °C within 3 h, which is much shorter than the annealing time at 600 °C of furnace annealing. We fabricated TFTs with poly-Si films crystallized by microwave annealing at low temperature and obtained the characteristics slightly better than or at least comparable to the TFTs by furnace annealing in spite of smaller grain size. This may be due to the improvement of surface roughness of poly-Si film. The poly-Si TFTs with PECVD a-Si film showed better characteristics than the TFTs with LPCVD a-Si film because of larger grain size and smoother Si/SiO2 interface.

Hydrogen Passivation of Thin-film Polysilicon Solar Cells

2007 ◽  
Vol 989 ◽  
Author(s):  
Lode Carnel ◽  
Ivan Gordon ◽  
Dries Van Gestel ◽  
Guy Beaucarne ◽  
Jef Poortmans
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Solar Cells ◽  
Low Cost ◽  
Hydrogen Passivation ◽  
Fine Grained ◽  
Si Solar Cells ◽  
Before And After ◽  
Plasma Passivation ◽  
Recombination Velocity

AbstractThin-film polysilicon solar cells are a promising low-cost alternative for bulk silicon solar cells. Due to their reduced material thickness, these solar cells are less dependent on the silicon feedstock price. Until now these devices showed a worse performance compared to bulk Si solar cells due to the small grain size and the high recombination velocity at the grain boundaries. A better understanding of hydrogen passivation is therefore of crucial importance to improve the efficiency of polysilicon solar cells. In this work we characterized fine-grained polysilicon layers with a grain size of only 0.2 μm before and after passivation. Plasma hydrogenation led to a higher hydrogen concentration in the first micron of the layer than nitride passivation. The highest efficiency of 5.0 % was reached when nitride passivation was followed by plasma passivation.

HfZnO/ZnO Heterostructures Fabricated Using Low-Cost Large-Area Compatible Sputtering Processes

2015 ◽  
Vol 1731 ◽  
Author(s):  
Chih-Hung Li ◽  
Jian-Zhang Chen ◽  
I-Chun Cheng
Keyword(s):  
Thin Film ◽  
Electrical Resistance ◽  
Thin Film Transistors ◽  
Carrier Mobility ◽  
Annealing Temperature ◽  
Low Cost ◽  
Zno Thin Films ◽  
Zno Thin Film ◽  
Large Area ◽  
Apparent Decrease

ABSTRACTWe investigated the electrical properties of the rf-sputtered HfxZn1-xO/ZnO heterostructures. The thermal annealing on ZnO prior to the HfxZn1-xO deposition greatly influences the properties of the heterostructures. A highly conductive interface formed at the interface between HfxZn1-xO and ZnO thin films as the ZnO annealing temperature exceeded 500°C, leading to the apparent decrease of the electrical resistance. The resistance decreased with an increase of either thickness or Hf content of the HfxZn1-xO capping layer. The Hf0.05Zn0.95O/ZnO heterostructure with a 200-nm-thick 600°C-annealed ZnO exhibits a carrier mobility of 14.3 cm2V-1s-1 and a sheet carrier concentration of 1.93×1013 cm-2; the corresponding values for the bare ZnO thin film are 0.47 cm2V-1s-1 and 2.27×1012 cm-2, respectively. Rf-sputtered HfZnO/ZnO heterostructures can potentially be used to increase the carrier mobility of thin-film transistors in large-area electronics.

Polycrystalline Si Films Fabricated by Low Temperature Selective Nucleation and Solid Phase Epitaxy Process

1997 ◽  
Vol 485 ◽  
Author(s):  
Claudine M. Chen ◽  
Harry A. Atwater
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Crystal Growth ◽  
Incubation Time ◽  
Solid Phase ◽  
Solid Phase Epitaxy ◽  
Grain Sizes ◽  
Random Nucleation ◽  
Nucleation Sites ◽  
Si Films

AbstractWith a selective nucleation and solid phase epitaxy (SNSPE) process, grain sizes of 10 μm have been achieved to date at 620°C in 100 nrm thick silicon films on amorphous SiO2, with potential for greater grain sizes. Selective nucleation occurs via a thin film reaction between a patterned array of 20 rnm thick indium islands which act as heterogeneous nucleation sites on the amorphous silicon starting material. Crystal growth proceeds by lateral solid phase epitaxy from the nucleation sites, during the incubation time for random nucleation. The largest achievable grain size by SNSPE is thus approximately the product of the incubation time and the solid phase epitaxy rate. Electronic dopants, such as B, P, and Al, are found to enhance the solid phase epitaxy rate and affect the nucleation rate.

A novel polymer as a functional dielectric layer for OTFTs to improve the grain size of the pentacene semiconductor

2016 ◽  
Vol 7 (11) ◽  
pp. 2143-2150 ◽  
Author(s):  
Yao Li ◽  
He Wang ◽  
Xuesong Wang ◽  
Zuosen Shi ◽  
Donghang Yan ◽  
...  
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Charge Carrier ◽  
Dielectric Layer ◽  
Thin Film Transistors ◽  
Carrier Mobility ◽  
Charge Carrier Mobility ◽  
Single Variable ◽  
Dielectric Layers ◽  
The Relationship

A series of novel polymers as functional dielectric layers for pentacene thin-film transistors was synthesized and investigated to explore the relationship between the grain size and the charge carrier mobility with a single variable.

Effect of Temperature on the Microstructure and Electrical Conductivity of Microcrystalline Si Films

2017 ◽  
Vol 895 ◽  
pp. 28-32 ◽  
Author(s):  
Hua Cheng ◽  
Di Wang ◽  
Feng Li Li
Keyword(s):  
Electrical Conductivity ◽  
Grain Size ◽  
Substrate Temperature ◽  
Cyclotron Resonance ◽  
Electron Cyclotron Resonance ◽  
Gaseous Mixture ◽  
Chemical Vapor ◽  
Effect Of Temperature ◽  
Si Films ◽  
Resonance Plasma

Micro-Si films were deposited using Ar diluted SiH4 gaseous mixture by electron cyclotron resonance plasma-enhanced chemical vapor deposition (ECR-PECVD). The effects of the substrate temperature on microstructure and electrical conductivity of micro-Si film were investigated. The results show that, with the increasing of substrate temperature, crystallinity and grain size increased monotonously, of which a competing balance would determine the electrical conductivity of micro-Si films. Based on these results, relatively small grain size and appropriate crystallinity would be beneficial to improve the electrical properties of micro-Si films.

Low temperature (≦600°C) unhydrogenated in-situ doped polysilicon thin film transistors: Towards a technology for flat panel displays

1997 ◽  
Vol 296 (1-2) ◽  
pp. 133-136 ◽  
Author(s):  
L. Pichon ◽  
F. Raoult ◽  
K. Mourgues ◽  
K. Kis-Sion ◽  
T. Mohammed-Brahim ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Flat Panel Displays ◽  
Flat Panel
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