High-Performance Thermoplastics for Rigid-Flex Printed Circuit Boards

1995 ◽  
Vol 390 ◽  
Author(s):  
Wendy W. Lin ◽  
Ender Savrun
Keyword(s):  
High Performance ◽  
Printed Circuit Boards ◽  
Adhesive Bonding ◽  
Coefficient Of Thermal Expansion ◽  
Performance Criteria ◽  
Screening Tests ◽  
Circuit Boards ◽  
Adhesive Failure ◽  
Fusion Bonding ◽  
Printed Circuit

ABSTRACTAdhesive failure of rigid-flex printed circuit boards (RF-PCBs) during use has degraded the performance of military avionics systems. Adhesive failure is often caused by differences in the coefficient of thermal expansion (CTE) between the materials used in RF-PCBs and by moisture absorption by the adhesives and polyimide (PI) films. High-performance thermoplastics were investigated to replace the epoxies, PIs, and adhesives currently used in RF-PCBs. Because thermoplastic materials are remeltable, adhesive bonding may be replaced by fusion bonding to join RF-PCBs. Fusion bonding would eliminate problems with material compatibility and differences in the CTE encountered with adhesive bonding. Industries that would benefit from this research are manufacturers of aerospace instrumentation, medical equipment, automotive systems, computers, telecommunications equipment, industrial instrumentation and controls, and consumer products, such as stereo systems and calculators.An extensive survey of high-performance-engineering thermoplastic materials was performed, and samples of the more promising materials (both films and chopped fiber reinforced) were obtained for preliminary screening tests. The tests performed were chemical resistance, water absorption, tensile strength, flexibility, and solder resistance of bare dielectric. From these tests, a glass-filled liquid crystal polymer film made by Hoescht Celanese Performance Films best met the performance criteria compared with the thermoplastics tested.

Advanced Build-up Materials for High Speed Transmission Application

2018 ◽  
Vol 2018 (1) ◽  
pp. 000305-000309 ◽  
Author(s):  
Shiro Tatsumi ◽  
Shohei Fujishima ◽  
Hiroyuki Sakauchi
Keyword(s):  
High Speed ◽  
Printed Circuit Boards ◽  
Transmission Loss ◽  
Coefficient Of Thermal Expansion ◽  
Strip Line ◽  
Circuit Boards ◽  
Additive Process ◽  
Printed Circuit ◽  
Low Dielectric ◽  
Transmission Speed

Abstract Build-up process is a highly effective method for miniaturization and high density integration of printed circuit boards. Along with increasing demands for high transmission speed of electronic devices with high functionality, packaging substrates installed with semiconductors in such devices are strongly required to reduce the transmission loss. Our insulation materials are used in a semi-additive process (SAP) with low dielectric loss tangent, smooth resin surface after desmear, and good insulation reliability. Actually, the transmission loss of strip line substrates and Cu surface roughness impact on transmission loss were measured using our materials. Furthermore, low dielectric molding film with low coefficient of thermal expansion (CTE) and low Young's modulus are introduced.

Advanced Build-up Materials and Processes for Packages with Fine Line and Space

2014 ◽  
Vol 2014 (1) ◽  
pp. 000444-000447 ◽  
Author(s):  
Yoshio Nishimura ◽  
Hirohisa Narahashi ◽  
Shigeo Nakamura ◽  
Tadahiko Yokota
Keyword(s):  
Printed Circuit Boards ◽  
Coefficient Of Thermal Expansion ◽  
High Reliability ◽  
Electronic Devices ◽  
Circuit Boards ◽  
Additive Process ◽  
Fine Line ◽  
Printed Circuit ◽  
Low Dielectric ◽  
Line Space

Printed circuit boards manufactured by a semi-additive process are widely used for packaging substrates. Along with increasing demands of downsizing electronic devices with high functionality, packaging substrates installed with semiconductors in such devices are strongly required to be miniaturized with high density of circuit wirings. We report our insulation build-up materials and processes for advanced packages with fine line/space and high reliability. The insulation materials we developed show low coefficient of thermal expansion (CTE), low dielectric loss tangent and good thinner insulation reliability. They can produce fine line and space (FLS) under 10μm pitch by a semi-additive process.

Investigation of Micro-Drilling for Printed Circuit Boards Containing High-Hardness Fillers

2012 ◽  
Vol 565 ◽  
pp. 442-447 ◽  
Author(s):  
Taiji Funabiki ◽  
Toshiki Hirogaki ◽  
Eiichi Aoyama ◽  
Keiji Ogawa ◽  
Hiroyuki Kodama
Keyword(s):  
Thermal Conductivity ◽  
Cutting Force ◽  
High Performance ◽  
Printed Circuit Boards ◽  
High Hardness ◽  
High Thermal Conductivity ◽  
Digital Cameras ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Micro Drilling

This paper describes micro-drilling processes for printed circuit boards (PCBs) containing fillers with high hardness and high thermal conductivity. Inspired primarily by devices such as digital cameras, laptop computers, and wireless communications devices, the electronics field today is continuously demanding smaller, lighter, and more technologically advanced high performance devices. However, that the increase in semiconductor-generated heat tends to affect such devices negatively. Additionally, from the viewpoint of environmental problems, electric vehicles and LEDs are being developed actively. PCBs are one of the principal components for building such devices. In recent years, PCBs containing alumina fillers with high thermal conductivity have been developed and begun to be widely used. However, when processing these PCBs, the drill tools become severely worn because of the filler’s high hardness. We therefore examined the drill wear characteristics. The results show the filler is the main factor that causes drill wear, while the increase in cutting force does not affect it. The cutting force increases with the drill wear linearly. Moreover, the characteristic of PCBs with higher filler content rates is close to that of inorganic material like ceramics.

Mounting Leadless Chip Carriers onto Printed Circuit Boards

1982 ◽  
Vol 1 (1) ◽  
pp. 38-43 ◽  
Author(s):  
D. Fishman ◽  
N. Cooper
Keyword(s):  
Thermal Expansion ◽  
Thermal Cycling ◽  
Printed Circuit Boards ◽  
Coefficient Of Thermal Expansion ◽  
Cycling Performance ◽  
Circuit Board ◽  
Circuit Boards ◽  
Acceptable Solution ◽  
Printed Circuit ◽  
Chip Carrier

It is reasoned that wide penetration of chip carriers into equipment for professional and commercial applications depends on developing methods for mounting the leadless types directly on to conventional polymer type printed circuit boards. The main problem to be overcome is fatigue failure of the solder joints due to the mismatch in thermal expansion, evidenced by poor thermal cycling performance. In this paper the thermal cycling performance is compared when four sizes of ceramic leadless chip carrier are mounted on a selection of printed circuit board materials ranging from the conventional to those specially formulated, either on the basis of matching the coefficient of thermal expansion of the chip carrier material, or to provide a layer of compliant elastomer material underneath the layer bearing the copper contact layer, so that strain due to thermal expansion mismatch is not transmitted to the solder layer. Over 400 thermal cycles (−55 to + 125°C) were recorded using proprietary versions of elastomer coated substrates. For appropriate applications the basis is thus laid for an economic and technically acceptable solution. The practical implications of two methods of soldering—wave (jet) and vapour phase—are also discussed.

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