Selective Aluminum CVD for Sub-Micron VIA Plug Filling

1992 ◽  
Vol 260 ◽  
Author(s):  
N. Zhu ◽  
S. K. Jo ◽  
M. B. Freiler ◽  
R. Scarmozzino ◽  
R. M. Osgood ◽  
...  
Keyword(s):  
Aspect Ratio ◽  
Integrated Circuits ◽  
High Aspect Ratio ◽  
Physical Vapor Deposition ◽  
Small Diameter ◽  
Chain Structure ◽  
Small Dimension ◽  
Process Window ◽  
Hole Filling ◽  
Custom Made

ABSTRACTWe present a novel technique to metallize high-aspect-ratio, small-dimension contact holes and via plugs for application to integrated circuits and packaging. The technique uses a laser-assisted process to deposit a thin film of aluminum from DMA1H, which forms a seed layer for subsequent selective CVD. The resistivity of the deposited aluminum is nearly that of the bulk metal, the contact resistivity is good (∼0.03 μΩ-cm2), and the morphology of the deposited film is comparable to that obtained with physical vapor deposition. This process has been used to fill via holes in a SiO2 substrate, and small-diameter (0.7 μm), high-aspect-ratio (3:1), aluminum plugs have been repeatedly formed without the incorporation of voids. A custom-made via chain structure was used to determine the via resistance (plug and contact), which was found to be 0.1 -0.3 Ω. Our technique opens a new process window for void-free high-aspect-ratio via and contact hole filling, and is particularly interesting in that it offers the potential to use aluminum or aluminum-copper in plug metallization.

Fluorocarbon Precursor for High Aspect Ratio via Milling in Focused Ion Beam Modification of Integrated Circuits

2004 ◽  
Author(s):  
Valery Ray
Keyword(s):  
Side Effects ◽  
Aspect Ratio ◽  
Integrated Circuits ◽  
High Aspect Ratio ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Enabling Technology ◽  
Si Substrate ◽  
Ion Beam Modification ◽  
The Past

Abstract Gas Assisted Etching (GAE) is the enabling technology for High Aspect Ratio (HAR) circuit access via milling in Focused Ion Beam (FIB) circuit modification. Metal interconnect layers of microelectronic Integrated Circuits (ICs) are separated by Inter-Layer Dielectric (ILD) materials, therefore HAR vias are typically milled in dielectrics. Most of the etching precursor gases presently available for GAE of dielectrics on commercial FIB systems, such as XeF2, Cl2, etc., are also effective etch enhancers for either Si, or/and some of the metals used in ICs. Therefore use of these precursors for via milling in dielectrics may lead to unwanted side effects, especially in a backside circuit edit approach. Making contacts to the polysilicon lines with traditional GAE precursors could also be difficult, if not impossible. Some of these precursors have a tendency to produce isotropic vias, especially in Si. It has been proposed in the past to use fluorocarbon gases as precursors for the FIB milling of dielectrics. Preliminary experimental evaluation of Trifluoroacetic (Perfluoroacetic) Acid (TFA, CF3COOH) as a possible etching precursor for the HAR via milling in the application to FIB modification of ICs demonstrated that highly enhanced anisotropic milling of SiO2 in HAR vias is possible. A via with 9:1 aspect ratio was milled with accurate endpoint on Si and without apparent damage to the underlying Si substrate.

Multi-Layer Photopolymer Micromachining

2005 ◽  
Vol 872 ◽  
Author(s):  
J. R. Huang ◽  
B. Bai ◽  
J. Shaw ◽  
T. N. Jackson ◽  
C. Y. Wei ◽  
...  
Keyword(s):  
Aspect Ratio ◽  
Integrated Circuits ◽  
High Aspect Ratio ◽  
Low Cost ◽  
Solution Process ◽  
Microfluidic Channel ◽  
Width Ratio ◽  
Large Area ◽  
Additive Process ◽  
Infiltration Process

AbstractThis paper presents a novel method to create and integrate micro-machined devices and high aspect-ratio (height-to-width ratio) microstructures in which the microstructures are built up using multiple layers of photopolymer film and/or viscous solution. Very high aspect-ratio 2-and 3-dimensional (2-D and 3-D) microstructures were constructed by stacking photo-imageable polymer films. Such films may be dry films applied by lamination or solution layers applied by bar coating, or doctor blade coating. Photolithography is used in both cases to define the microstructure. This additive process of thin-film micromachining facilitates high aspect-ratio microstructure fabrication. We have demonstrated structures of up to 12-layers comprising 2-D arrays of deep trenches (180 μm deep and 25 μm wide) and a 2-layer SU-8 micro-trench array with an aspect ratio up to 36 on glass substrates. Miniaturized structures of interconnected reservoirs as small as 50 μm × 50 μm × 15 μm (∼38 pico liter storage capacity) are also being fabricated, along with a novel 5-layer microfluidic channel array and a vacuum-infiltration process for fluid manipulation. This method has the potential to create functional large-area micro-devices at low-cost and with increased device flexibility, durability, prototyping speed, and reduced process complexity for applications in optoelectronics, integrated detectors, and bio-devices. The novel multi-layer photopolymer dry film and solution process also allows microstructures in micro-electro-mechanical systems (MEMS) to be built with ease and provides the functionality of MEMS integration with electronic devices and integrated circuits (ICs).

High Aspect Ratio Hole Filling with CVD Tungsten for Multi-level Interconnection

1986 ◽  
Author(s):  
K. Suguro ◽  
Y. Nakasaki ◽  
S. Shima ◽  
T. Yoshii ◽  
T. Moriya ◽  
...  
Keyword(s):  
Aspect Ratio ◽  
High Aspect Ratio ◽  
Hole Filling ◽  
Multi Level

Parameters Affecting the Process Window for Laser Planarization of Aluminum.

1990 ◽  
Vol 181 ◽  
Author(s):  
Ivo J Raaijmakers ◽  
Harren Chu ◽  
Edith Ong ◽  
Shi-Qing Wang ◽  
Ken Ritz
Keyword(s):  
Aspect Ratio ◽  
Integrated Circuits ◽  
Laser Irradiation ◽  
Metal Surface ◽  
Laser Pulses ◽  
Process Window ◽  
Metal Thickness ◽  
Deposited Metal ◽  
Via Holes ◽  
Task Conditions

ABSTRACTIrradiation with excimer laser pulses is demonstrated as a technique to fill contact/via holes for integrated circuits with Al-(1 wt.%)Cu. We discussed the influence of the size, shape and aspect ratio of the contact hole, and the metal thickness on the process (attitude for laser planarization. The most dominant parameters found to influence the planariza-tion process are the shape of the contact, and the shape of the as-deposited metal surface (“step coverage”). The application of a Cu anti-reflection coating increased the process window substantially. Although a planar Al-Cu surface was easily formed with laser irradiation, void free filling of contact holes was a more demanding task. Conditions for which completely filled contacts can be obtained were discussed.

High Aspect Ratio Contact Clean Study in 58nm Flash Device

2009 ◽  
Vol 145-146 ◽  
pp. 35-38
Author(s):  
Pi Chun Yu ◽  
Cheng Kuen Chen ◽  
Jin Lang Lin ◽  
Chih Ning Wu ◽  
Hiroshi Matsuo
Keyword(s):  
Aspect Ratio ◽  
Contact Resistance ◽  
High Aspect Ratio ◽  
Size Control ◽  
Design Rule ◽  
Process Window ◽  
Particle Removal ◽  
Cleaning Efficiency ◽  
Higher Temperature ◽  
Parameter Dependency

In the conventional wet cleaning process of contact holes landing on the Si substrate and WSi metal gate, the ILD BPTEOS bowing and CD enlargement were often found by using dilute HF solution. With the device design rule decreasing, the CD size control and cleaning efficiency enhancement are highly demanded. In this work, the high aspect-ratio contact (AR~10) cleaning in single wafer (SW) tool was demonstrated in 58nm flash device. With the facilitation of nano-spray function to enhance particle removal efficiency (PRE), AM1 cleaning in SW tool can achieve the low contact resistance and tighten Rc distribution with less ILD film damage and lower CD enlargement. The parameter dependency of SW tool, including chemical injection method, nozzle swinging effect and nano-spray function, on contact resistance was also investigated. Compared to AM1 cleaning in bench tool, AM1 process in SW tool performs the larger process window for less ILD film damage at higher temperature and concentration.

Modeling Secondary Electron Emission from High Aspect Ratio Holes

2003 ◽  
Author(s):  
Q. S. Wang ◽  
M. A. Thompson ◽  
W. Schultz ◽  
T. R. Lundquist
Keyword(s):  
Aspect Ratio ◽  
Integrated Circuits ◽  
Electron Emission ◽  
High Aspect Ratio ◽  
Secondary Electron ◽  
Secondary Electron Emission ◽  
Monitoring Technique

Abstract The success of circuit editing depends not only on x-y navigation to precise coordinates on the integrated circuits (IC), but also on precise z navigation. Certainly, secondary electron (SE) emission has proven to be the most accurate monitoring technique to accomplish this z precision. Even so, it has been amazing that SE monitoring works in high aspect ratio holes—reports have been made of high aspect ratio holes near 30:1. To explain why this occurs, therefore, is of interest and, by understanding how it works, we may improve the technique.

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