Dependence of Buried CoSi2 Resistivity on ION Implantation and Annealing Conditions1

1991 ◽  
Vol 235 ◽  
Author(s):  
Fereydoon Namavar ◽  
N. M. Kalkhoran ◽  
J. M. Manke ◽  
L. Luo ◽  
J. T. McGinn

ABSTRACTWe have investigated the dependence of electrical and material properties of buried CoSi2 layers on Co+ implantation and annealing conditions. The results indicated that the electrical resistivity and crystalline quality of the implanted buried CoSi2 layers depend strongly on the implantation temperature. CoSi2 layers with the lowest resistivity and best crystalline quality (Xmin as low as 3.6%) were obtained from samples implanted at 300°C-400°C. Implantation at higher temperatures (e.g., 580°C) produced cobalt disilicide layers with significantly higher electrical resistivity and a Xmin of about 10.7%.

1979 ◽  
Vol 34 (1) ◽  
pp. 76-78 ◽  
Author(s):  
S. S. Lau ◽  
S. Matteson ◽  
J. W. Mayer ◽  
P. Revesz ◽  
J. Gyulai ◽  
...  

1983 ◽  
Vol 22 (Part 2, No. 2) ◽  
pp. L118-L120 ◽  
Author(s):  
Tanemasa Asano ◽  
Hiroshi Ishiwara ◽  
Kouzo Orihara ◽  
Seijiro Furukawa

1992 ◽  
Vol 60 (4) ◽  
pp. 451-453 ◽  
Author(s):  
Ken‐ichi Shoji ◽  
Akira Fukami ◽  
Takahiro Nagano ◽  
Takashi Tokuyama ◽  
Cary Y. Yang

2018 ◽  
Vol 924 ◽  
pp. 353-356
Author(s):  
Yukihiro Furukawa ◽  
Hideo Suzuki ◽  
Noriaki Tani ◽  
Yusuke Kobayashi ◽  
Naoyuki Ohse ◽  
...  

We investigated the relationship between ion implantation-induced defects and electrical characteristics, especially focusing on the leak failure rate in SiC IEMOSs and PN diodes. It was found that dislocation exists in each leakage point by analyzing identical leak-failed IEMOS by emission microscopy and refraction X-ray topography. The leak failure rate of the PN diodes and IEMOS was improved with an increase in the ion implantation temperature under the implantation and annealing conditions used in this experiment. It is considered that ion implantation-induced defects lead to an increase in leak failure rates, and also enable a decrease in leak failure rates by raising the implantation temperature up to 600 deg.C.


Author(s):  
Alain Claverie ◽  
Zuzanna Liliental-Weber

GaAs layers grown by MBE at low temperatures (in the 200°C range, LT-GaAs) have been reported to have very interesting electronic and transport properties. Previous studies have shown that, before annealing, the crystalline quality of the layers is related to the growth temperature. Lowering the temperature or increasing the layer thickness generally results in some columnar polycrystalline growth. For the best “temperature-thickness” combinations, the layers may be very As rich (up to 1.25%) resulting in an up to 0.15% increase of the lattice parameter, consistent with the excess As. Only after annealing are the technologically important semi-insulating properties of these layers observed. When annealed in As atmosphere at about 600°C a decrease of the lattice parameter to the substrate value is observed. TEM studies show formation of precipitates which are supposed to be As related since the average As concentration remains almost unchanged upon annealing.


Author(s):  
A. De Veirman ◽  
J. Van Landuyt ◽  
K.J. Reeson ◽  
R. Gwilliam ◽  
C. Jeynes ◽  
...  

In analogy to the formation of SIMOX (Separation by IMplanted OXygen) material which is presently the most promising silicon-on-insulator technology, high-dose ion implantation of cobalt in silicon is used to synthesise buried CoSi2 layers. So far, for high-dose ion implantation of Co in Si, only formation of CoSi2 is reported. In this paper it will be shown that CoSi inclusions occur when the stoichiometric Co concentration is exceeded at the peak of the Co distribution. 350 keV Co+ ions are implanted into (001) Si wafers to doses of 2, 4 and 7×l017 per cm2. During the implantation the wafer is kept at ≈ 550°C, using beam heating. The subsequent annealing treatment was performed in a conventional nitrogen flow furnace at 1000°C for 5 to 30 minutes (FA) or in a dual graphite strip annealer where isochronal 5s anneals at temperatures between 800°C and 1200°C (RTA) were performed. The implanted samples have been studied by means of Rutherford Backscattering Spectroscopy (RBS) and cross-section Transmission Electron Microscopy (XTEM).


Nanomaterials ◽  
2021 ◽  
Vol 11 (4) ◽  
pp. 928
Author(s):  
Yong Du ◽  
Zhenzhen Kong ◽  
Muhammet Toprak ◽  
Guilei Wang ◽  
Yuanhao Miao ◽  
...  

This work presents the growth of high-quality Ge epilayers on Si (001) substrates using a reduced pressure chemical vapor deposition (RPCVD) chamber. Based on the initial nucleation, a low temperature high temperature (LT-HT) two-step approach, we systematically investigate the nucleation time and surface topography, influence of a LT-Ge buffer layer thickness, a HT-Ge growth temperature, layer thickness, and high temperature thermal treatment on the morphological and crystalline quality of the Ge epilayers. It is also a unique study in the initial growth of Ge epitaxy; the start point of the experiments includes Stranski–Krastanov mode in which the Ge wet layer is initially formed and later the growth is developed to form nuclides. Afterwards, a two-dimensional Ge layer is formed from the coalescing of the nuclides. The evolution of the strain from the beginning stage of the growth up to the full Ge layer has been investigated. Material characterization results show that Ge epilayer with 400 nm LT-Ge buffer layer features at least the root mean square (RMS) value and it’s threading dislocation density (TDD) decreases by a factor of 2. In view of the 400 nm LT-Ge buffer layer, the 1000 nm Ge epilayer with HT-Ge growth temperature of 650 °C showed the best material quality, which is conducive to the merging of the crystals into a connected structure eventually forming a continuous and two-dimensional film. After increasing the thickness of Ge layer from 900 nm to 2000 nm, Ge surface roughness decreased first and then increased slowly (the RMS value for 1400 nm Ge layer was 0.81 nm). Finally, a high-temperature annealing process was carried out and high-quality Ge layer was obtained (TDD=2.78 × 107 cm−2). In addition, room temperature strong photoluminescence (PL) peak intensity and narrow full width at half maximum (11 meV) spectra further confirm the high crystalline quality of the Ge layer manufactured by this optimized process. This work highlights the inducing, increasing, and relaxing of the strain in the Ge buffer and the signature of the defect formation.


2021 ◽  
Vol 3 (2) ◽  
Author(s):  
Salah Amrani ◽  
Duygu Kocaefe ◽  
Yasar Kocaefe ◽  
Dipankar Bhattacharyay ◽  
Mohamed Bouazara ◽  
...  

AbstractCarbon anodes are used in the electrolytic production of aluminum. The quality of anodes is directly related to the production cost, carbon and energy consumption, and environmental emissions. It is desired that the anodes have high density, low porosity/cracks, low electrical resistivity as well as low air and CO2 reactivities. Low resistivity of anodes reduces energy required to produce aluminum during electrolysis. The presence of cracks and pores increases the anode electrical resistivity. Therefore, it is important to know how and when the pores and cracks form during the anode production so that the necessary actions could be taken to prevent their formation. A study was carried out to investigate the effect of different anode production parameters such as anode composition, type of raw material used, time and top-former bellow pressure of vibro-compactor, green anode cooling medium, and heating rate used during baking on the crack formation. The anodes are fabricated at the carbon laboratory of University of Quebec at Chicoutimi (UQAC) and characterized by measuring their properties (density, electrical resistivity, and surface crack density). The anode properties, hence the anode quality, were correlated with the anode production parameters. Also, their tomographic analysis was carried out to visualize and quantify the internal cracks. Graphical abstract


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