Internal Stress Development In Spin Coated Polyimide Films

1991 ◽  
Vol 227 ◽  
Author(s):  
Michael T. Pottiger ◽  
John Coburn
Keyword(s):  
Internal Stress ◽  
Molecular Orientation ◽  
Coefficient Of Thermal Expansion ◽  
Internal Stresses ◽  
Processing Conditions ◽  
Heating Rates ◽  
Polyimide Films ◽  
Plane Orientation ◽  
Relaxation Effects ◽  
Cte Mismatch

ABSTRACTThe effect of processing on the development of internal stresses in spin coated polyimide films was investigated. The internal stresses are a result of the coefficient of thermal expansion (CTE) mismatch between the polymer and the substrate. Birefringence and CTE were used to characterize the in-plane molecular orientation. In-plane orientation was shown to be sensitive to processing conditions. Increasing the spin speed results in higher in-plane orientation as observed by an increase in birefringence and a corresponding decrease in CTE. Heating rate during cure was observed to have a significant effect on in-plane orientation. Faster heating rates during cure resulted in a lower birefringence. The lower birefringence is attributed to relaxation effects that can occur during a rapid cure. The decrease in orientation was accompanied by an increase in internal stress.

Molecular Orientation and Photocurrent of Alkyl-Aromatic Polyimide Films Prepared by Vapor Deposition Polymerization

1989 ◽  
Vol 28 (Part 1, No. 12) ◽  
pp. 2552-2555 ◽  
Author(s):  
Kazuo Iida ◽  
Tsukasa Nohara ◽  
Kazuyuki Totani ◽  
Shuhei Nakamura ◽  
Goro Sawa
Keyword(s):  
Vapor Deposition ◽  
Molecular Orientation ◽  
Polyimide Films ◽  
Aromatic Polyimide

Internal Stresses in Nanocrystalline Nickel and Nickel-Iron Alloys

2012 ◽  
Vol 706-709 ◽  
pp. 1607-1611 ◽  
Author(s):  
J.D. Giallonardo ◽  
Uwe Erb ◽  
G. Palumbo ◽  
G.A. Botton ◽  
C. Andrei
Keyword(s):  
Grain Size ◽  
Internal Stress ◽  
Structural Difference ◽  
Intrinsic Stress ◽  
Internal Stresses ◽  
Second Phase ◽  
Nickel Iron ◽  
Second Phase Particles ◽  
Second Phases ◽  
Rule Out

Nanocrystalline metals are often produced in a state of stress which can adversely affect certain properties, e.g. corrosion resistance, wear, fatigue strength, etc. This stress is referred to as internal or “intrinsic” stress since it is not directly caused by applied loads. The structural causes of these stresses in nanocrystalline materials are not fully understood and are therefore an area of particular interest. The internal stresses of nanocrystalline Ni and Ni-16wt%Fe were measured and found to increase with the addition of iron. Characterization using HR-TEM revealed no signs of porosity, second phase particles, or a high density of dislocations. Both materials possessed well defined high-angle grain boundaries. The main structural difference between the two materials was found to be grain size and correspondingly, a decrease in grain size resulted in an increase in internal stress which supports the applicability of the coalescence theory. The current study also provides evidence to rule out the effect of voids (or porosity), dislocations, and second phases as possible causes of internal stress.

scholarly journals Application of the Mathar Method to Identify Internal Stress Variation in Steel as a Welding Process Result

2017 ◽  
Vol 25 (2) ◽  
pp. 125-136
Author(s):  
Dariusz Kowalski
Keyword(s):  
Internal Stress ◽  
Welding Process ◽  
Internal Stresses ◽  
Induced Voltage ◽  
Stress Variation ◽  
Steel Members ◽  
Electric Arc Welding ◽  
Destructive Measurement ◽  
Non Destructive ◽  
Excessive Stress

Abstract The paper deals with the method to identify internal stresses in two-dimensional steel members. Steel members were investigated in the delivery stage and after assembly, by means of electric-arc welding. In order to perform the member assessment two methods to identify the stress variation were applied. The first is a non-destructive measurement method employing local external magnetic field and to detecting the induced voltage, including Barkhausen noise The analysis of the latter allows to assess internal stresses in a surface layer of the material. The second method, essential in the paper, is a semi-trepanation Mathar method of tensometric strain variation measurement in the course of a controlled void-making in the material. Variation of internal stress distribution in the material led to the choice of welding technology to join. The assembly process altered the actual stresses and made up new stresses, triggering post-welding stresses as a response for the excessive stress variation.

Numerical Study of Thermal Stresses in a Planar Solid Oxide Fuel Cell Stack

2017 ◽  
Author(s):  
Cun Wang ◽  
Tao Zhang ◽  
Cheng Zhao ◽  
Jian Pu
Keyword(s):  
Thermal Stress ◽  
Fuel Cell ◽  
Solid Oxide Fuel Cell ◽  
Thermal Stresses ◽  
Coefficient Of Thermal Expansion ◽  
Numerical Study ◽  
Solid Oxide ◽  
Oxide Fuel ◽  
Compressive Loads ◽  
Cte Mismatch

A three dimensional numerical model of a practical planar solid oxide fuel cell (SOFC) stack based on the finite element method is constructed to analyze the thermal stress generated at different uniform temperatures. Effects of cell positions, different compressive loads, and coefficient of thermal expansion (CTE) mismatch of different SOFC components on the thermal stress distribution are investigated in this work. Numerical results indicate that the maximum thermal stress appears at the corner of the interface between ceramic sealants and cells. Meanwhile the maximum thermal stress at high temperature is significantly larger than that at room temperature (RT) and presents linear growth with the increase of operating temperature. Since the SOFC stack is under the combined action of mechanical and thermal loads, the distribution of thermal stress in the components such as interconnects and ceramic sealants are greatly controlled by the CTE mismatch and scarcely influenced by the compressive loads.

scholarly journals Investigation on Die Crack in a Stacked Die Package Using Finite Element Analysis

2021 ◽  
pp. 83-91
Author(s):  
Jefferson Talledo
Keyword(s):  
Finite Element Analysis ◽  
Finite Element ◽  
Coefficient Of Thermal Expansion ◽  
Crack Problem ◽  
Element Analysis ◽  
Robust Solution ◽  
Die Attach ◽  
Die Stress ◽  
Cte Mismatch ◽  
Semiconductor Packages

Die crack is one of the problems in stacked die semiconductor packages. As silicon dies become thinner in such packages due to miniaturization requirement, the tendency to have die crack increases. This study presents the investigation done on a die crack issue in a stacked die package using finite element analysis (FEA). The die stress induced during the package assembly processes from die attach to package strip reflow was analyzed and compared with the actual die crack failure in terms of the location of maximum die stress at unit level as well as strip level. Stresses in the die due to coefficient of thermal expansion (CTE) mismatch of the package component materials and mechanical bending of the package in strip format were taken into consideration. Comparison of the die stress with actual die crack pointed to strip bending as the cause of the problem and not CTE mismatch. It was found that the die crack was not due to the thermal processes involved during package assembly. This study showed that analyzing die stress using FEA could help identify the root cause of a die crack problem during the stacked die package assembly and manufacturing as crack occurs at locations of maximum stress. The die crack mechanism can also be understood through FEA simulation and such understanding is very important in coming up with robust solution.

Research on Internal Stress in Electroplated Cu Films and Ni Films on Ag Substrates

2011 ◽  
Vol 287-290 ◽  
pp. 3085-3088
Author(s):  
Yao Min Zhu ◽  
Shan Shan Wang ◽  
Feng Zhang Ren
Keyword(s):  
Film Thickness ◽  
Internal Stress ◽  
Calculation Model ◽  
Internal Stresses ◽  
Film Material ◽  
Beam Test ◽  
Cu Films ◽  
Cu Film ◽  
Reduced Gradient

Electroplating was employed to prepare Cu films and Ni films on Ag substrates. The average internal stresses in Cu film and Ni film were measured in situ by cantilever beam test. The values of experimental internal stresses were compared with theoretical internal stresses. The results showed that the internal stresses of Cu film and Ni film decreased with the increase of the film thickness. The reduced gradient was faster. The values of experimental and theoretical internal stresses had the same variation trend with film thickness and the same characteristics (tensile stress). Theoretical calculation model of internal stress was of accuracy. The internal stress for the same substrate was in relation to the film material.

Effect of Thermal Residual Stresses on Polymer/Metal Interfacial Adhesion

1999 ◽  
Author(s):  
Qizhou Yao ◽  
Jianmin Qu
Keyword(s):  
Residual Stress ◽  
Residual Stresses ◽  
Coefficient Of Thermal Expansion ◽  
Interfacial Crack ◽  
Thermal Residual Stress ◽  
Element Analysis ◽  
Thermal Residual Stresses ◽  
Interfacial Cracks ◽  
Cte Mismatch ◽  
Elastic Mismatch

Abstract In this study, the apparent fracture toughness of the interfaces of several epoxy-based polymeric adhesives and metal (aluminum) substrate is experimentally measured. Double layer specimens with initial interfacial cracks are made for four-point bending tests. Thermal residual stresses exist on the interface due to the coefficient of thermal expansion (CTE) mismatch between the underfill and aluminum. Silica fillers are used to modify the CTE of the epoxy-based adhesives so that various levels of interface thermal residual stresses are achieved. Finite element analysis is also performed to quantify the effects of CTE mismatch as well as the elastic mismatch across the interface. It is found that the apparent interfacial toughness is significantly affected by the thermal residual stress, while the effect of elastic mismatch is negligible. In general thermal residual stress undermines the resistance to an interfacial crack. In some cases the residual stress is sufficient to result in adhesive and/or cohesive failure.

Development of G-Helix Structure as Off-Chip Interconnect

2004 ◽  
Vol 126 (2) ◽  
pp. 237-246 ◽  
Author(s):  
Qi Zhu ◽  
Lunyu Ma ◽  
Suresh K. Sitaraman
Keyword(s):  
Mechanical Performance ◽  
Coefficient Of Thermal Expansion ◽  
Mechanical Analysis ◽  
Organic Substrate ◽  
Electrical Performance ◽  
Wafer Level ◽  
Wafer Level Packaging ◽  
Package Weight ◽  
Mechanical Compliance ◽  
Cte Mismatch

Microsystem packages continue to demand lower cost, higher reliability, better performance and smaller size. Compliant wafer-level interconnects show great potential for next-generation packaging. G-Helix, an electroplated compliant wafer-level chip-to-substrate interconnect can facilitate wafer-level probing as well as wafer-level packaging without the need for an underfill. The fabrication of the G-Helix interconnect is similar to conventional IC fabrication process and is based on electroplating and photolithography. G-Helix interconnect has good mechanical compliance in the three orthogonal directions and can accommodate the differential displacement induced by the coefficient of thermal expansion (CTE) mismatch between the silicon die and the organic substrate. In this paper, we report the wafer-level fabrication of an area-arrayed G-Helix interconnects. The geometry effect on the mechanical compliance and electrical parasitics of G-Helix interconnects have been studied. Thinner and narrower arcuate beams with larger radius and taller post are found to have better mechanical compliance. However, it is also found that structures with excellent mechanical compliance may not have good electrical performance. Therefore, a trade off is needed. Using response surface methodology (RSM), an optimization has been done. Furthermore, reliability of the optimized G-helix interconnects in a silicon-on-organic substrate assembly has been assessed, which includes the package weight and thermo-mechanical analysis. The pitch size effect on the electrical and mechanical performance of G-Helix interconnects has also been studied.

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