Multi-Wafer Atomic Layer Epitaxy Reactor for Device Quality GaAs

1991 ◽  
Vol 222 ◽  
Author(s):  
P. C. Colter ◽  
S. A. Hussien ◽  
A. Dip ◽  
M. U. Erdogan ◽  
S. M. Bedair

ABSTRACTReactor design considerations are discussed relevant to the two main problems, carbon contamination and low growth rate, facing Atomic Layer Epitaxy (ALE) of GaAs. A new reactor design addressing these problems is described. It utilizes the concept of rotating the substrate between streams of reactant gases. The growth chamber provides baffles and gas jets to shear off and sweep away the thermal boundary layer after exposure to the reactive gas streams. Construction is based on modification of a commercially available low pressure MOCVD reactor equipped with a. load lock. The reactor is capable of processing three, two-inch wafers. A background carbon concentration of about 1015cm−3 and a 77°K mobility of 30,000 cm2/V-sec were achieved. Self limited growth was observed for a growth temperature as high as 600 °C. Controlled p- and n-type doping was accomplished by changing growth conditions and adding silane.

1995 ◽  
Vol 387 ◽  
Author(s):  
J. L. Hoyt ◽  
P. Kuo ◽  
K. Rim ◽  
J. J. Welser ◽  
R. M. Emerson ◽  
...  

AbstractMaterial and device challenges for Rapid Thermal Processing (RTP) of heterostructures are discussed, focusing on RTP-based epitaxy in the Si/Si1−xGex system. While RTP-based heteroepitaxy offers enhanced processing flexibility, it also poses significant challenges for temperature measurement and control. Several examples of Si/Si1−xGex device structures are discussed from the point of view of the sensitivity of device parameters to variations in layer thickness and composition. The measured growth kinetics for Si and Si1−xGex are then used to estimate growth temperature tolerances for these structures. Demanding applications are expected to require temperature control and uniformity to within 0.5°C.Future research challenges include the fabrication of structures with monolayer thickness control using self-limited growth techniques. Atomic layer epitaxy (ALE) is a well-known example of such a growth technique. In ALE, the wafer is cyclically exposed to different reactants, to achieve layer-by-layer growth. An RTP-based atomic layer epitaxy process, and its application to the growth of CdTe films, is briefly discussed. The extension to Column IV alloys follows readily. The RTP-based process enables self-limited growth for precursor combinations for which isothermal ALE is not feasible.


1991 ◽  
Vol 222 ◽  
Author(s):  
S. M. Bedair

ABSTRACTThe potential applications of Atomic Layer Epitaxy of III–V compounds will be outlined. These include the growth of special structures and devices such as ordered alloys, ultra-thin quantum wells, non-alloyed contacts, planar doped FET's and HBT's. Also, the main challenges facing ALE will be outlined along with possible solutions. These include reactor design, control of carbon doping and the growth of ternary alloys. A general assessment of the ALE technology will be provided.


1996 ◽  
Vol 35 (Part 1, No. 10) ◽  
pp. 5416-5420 ◽  
Author(s):  
Chun Hsing Liu ◽  
Meiso Yokoyama ◽  
Yan Kuin Su

1993 ◽  
Vol 225 (1-2) ◽  
pp. 105-108 ◽  
Author(s):  
H. Liu ◽  
P.A. Zawadzki ◽  
P.E. Norris

2020 ◽  
Vol 59 (SG) ◽  
pp. SGGF10
Author(s):  
Masahiro Kawano ◽  
Ryo Minematsu ◽  
Tomohiro Haraguchi ◽  
Atsuhiko Fukuyama ◽  
Hidetoshi Suzuki

1996 ◽  
Vol 80 (4) ◽  
pp. 2363-2366 ◽  
Author(s):  
Hiroyuki Fujiwara ◽  
Toshiyuki Nabeta ◽  
Isamu Shimizu ◽  
Takashi Yasuda

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