Integration of Si-MBE and Device Processing

1991 ◽  
Vol 220 ◽  
Author(s):  
D. J. Gravesteijn ◽  
G. F. A. Van De Walle ◽  
A. Pruijmboom ◽  
A. A. Van Gorkum

ABSTRACTA review is given of the requirements on MBE-grown layers as far as processing is concerned. Aspects that are considered are: defect density, particulates, background doping and metallic contamination. The stability of the grown layers against thermal anneals is considered. It is shown that normal thermal diffusion in HBT structures is not important, other effects, like transient diffusion following ion implantation, have drastic effects on the grown profiles. As an example the processing of mesa-isolated heterojunction bipolar transistors is treated. It is shown that all-Si transistors can be grown with ideal Gummel plots. The Gummel plots of SiGe HBTs show small non-idealities. The current gain enhancement of the HBTs with respect to the all-Si transistors is shown to be as large as 200 times. Due to transient diffusion, parasitic barriers are formed, that have a detrimental effect on the AC and DC performance.

1998 ◽  
Vol 525 ◽  
Author(s):  
B. Tillack ◽  
D. Bolze ◽  
G. Fischer ◽  
G. Kissinger ◽  
D. Knoll ◽  
...  

ABSTRACTWe have determined the process capability of Low Pressure (Rapid Thermal) Chemical Vapor Deposition (LP(RT)CVD) of epitaxial Si/SiGe/Si stacks for heterojunction bipolar transistors (HIBTs). The transistor parameters primarily influenced by the epitaxial characteristics were measured for 600 identically processed 4” wafers. The results demonstrate that it is possible to control accurately the epitaxial process for a 25 nm thick graded SiGe base profile with 20 % Ge and very narrow B doping (5 nm). The pipe limited device yield of about 90 % for an emitter area of 104 μm2 indicates a very low defect density in the epitaxial layer stack. The process capability indices determined from about 40,000 data points demonstrate the stability and capability of the LP(RT)CVD epitaxy with regard to manufacturing requirements.


1994 ◽  
Vol 65 (11) ◽  
pp. 1403-1405 ◽  
Author(s):  
S. R. D. Kalingamudali ◽  
A. C. Wismayer ◽  
R. C. Woods ◽  
J. S. Roberts

2004 ◽  
Vol 833 ◽  
Author(s):  
Byoung-Gue Min ◽  
Jong-Min Lee ◽  
Seong-Il Kim ◽  
Chul-Won Ju ◽  
Kyung-Ho Lee

ABSTRACTA significant degradation of current gain of InP/InGaAs/InP double heterojunction bipolar transistors was observed after passivation. The amount of degradation depended on the degree of surface exposure of the p-type InGaAs base layer according to the epi-structure and device structure. The deposition conditions such as deposition temperature, kinds of materials (silicon oxide, silicon nitride and aluminum oxide) and film thickness were not major variables to affect the device performance. The gain reduction was prevented by the BOE treatment before the passivation. A possible explanation of this behavior is that unstable non-stoichiometric surface states produced by excess In, Ga, or As after mesa etching are eliminated by BOE treatment and reduce the surface recombination sites.


2005 ◽  
Vol 87 (2) ◽  
pp. 023503 ◽  
Author(s):  
Yasuhiro Oda ◽  
Haruki Yokoyama ◽  
Kenji Kurishima ◽  
Takashi Kobayashi ◽  
Noriyuki Watanabe ◽  
...  

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