Sustained Percolation in Stretched Silver Nanowire Networks for Stretchable Inter-Connection Applications

2014 ◽  
Vol 1685 ◽  
Author(s):  
Jae Sung Park ◽  
Woo Soo Kim
Keyword(s):  
Stress Concentration ◽  
Elastic Material ◽  
Printed Circuit Board ◽  
Silver Nanowire ◽  
Circuit Board ◽  
Printed Circuit ◽  
Highly Stretchable ◽  
Tensile Strains ◽  
Nanowire Networks

ABSTRACTHere we introduce a highly stretchable Printed Circuit Board (PCB) inter-connection technology achieved through the combination of flexibility allowed by the silver nanowire (AgNW)-based electrode and stretchability provided by the meander-shaped substrate. Horseshoe-shaped elastic material, polydimethylsiloxane, is used as a substrate of the AgNW conductors for relaxed stress concentration. Continuously maintained 2-D percolation of stretchable AgNW networks overcomes the usage restrictions with ordinary rigid Printed Circuit Board (PCB). The horseshoe-shaped inter-connection is physically reliable with repeated stretching/releasing processes and maintains its conductivity under tensile strains up to 20 %, allowing the durable and stretchable PCB inter-connecting applications.

Thermal Fatigue Damage in the Solder Joints of Leadless Chip Resistors

1994 ◽  
Vol 116 (2) ◽  
pp. 83-88 ◽  
Author(s):  
R. K. Govila ◽  
E. Jih ◽  
Y.-H. Pao ◽  
C. Larner
Keyword(s):  
Stress Concentration ◽  
Fatigue Damage ◽  
Thermal Fatigue ◽  
Critical Stress ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Circuit Board ◽  
Printed Circuit ◽  
Modeling Analysis ◽  
Leadless Chip Resistors

Leadless chip resistors (LCR) made by two different manufacturers and surface mounted on glass/epoxy printed circuit board (PCB) were subjected to thermal cycling between −55°C to 125°C in order to induce thermal fatigue failure/damage. The test units were subjected to a maximum of 250 thermal cycles. Solder joints in both types of LCRs were examined in scanning electron microscope and a relative comparison of the extent of fatigue damage is presented. The failure mechanism is associated with cracking in the eutectic compostion Sn/Pb solder initiated at the stress concentration sites. A nonlinear, time-dependent finite element modeling analysis has been performed to determine critical stress concentration sites in the solder joint. Key parameters leading to the initiation of solder damage are identified, and recommendations are made to improve the design in terms of solder configuration such as the radius of corner of the alumina substrate and the standoff height.

scholarly journals Highly Integrated Elastic Island-Structured Printed Circuit Board with Controlled Young’s Modulus for Stretchable Electronics

Micromachines ◽  
2020 ◽  
Vol 11 (6) ◽  
pp. 617
Author(s):  
Duho Cho ◽  
Junhyung Kim ◽  
Pyoenggeun Jeong ◽  
Wooyoung Shim ◽  
Su Yeon Lee ◽  
...  
Keyword(s):  
Young’S Modulus ◽  
Printed Circuit Board ◽  
Young's Modulus ◽  
Circuit Board ◽  
Stretchable Electronics ◽  
Fully Integrated ◽  
Printed Circuit ◽  
Reinforcing Agent ◽  
Highly Stretchable ◽  
Levels Of Integration

A stretchable printed circuit board (PCB), which is an essential component of next-generation electronic devices, should be highly stretchable even at high levels of integration, as well as durable under repetitive stretching and patternable. Herein, an island-structured stretchable PCB composed of materials with controlled Young’s modulus and viscosity by adding a reinforcing agent or controlling the degree of crosslinking is reported. Each material was fabricated with the most effective structures through a 3D printer. The PCB was able to stretch 71.3% even when highly integrated and was patterned so that various components could be mounted. When fully integrated, the stress applied to the mounted components was reduced by 99.9% even when stretched by over 70%. Consequently, a 4 × 4 array of capacitance sensors in a stretchable keypad demonstration using our PCB was shown to work, even at 50% stretching of the PCB.

Characteristics of Radiated Emission from a Printed Circuit Board with a Slit

2012 ◽  
Vol 132 (6) ◽  
pp. 404-410 ◽  
Author(s):  
Kenichi Nakayama ◽  
Kenichi Kagoshima ◽  
Shigeki Takeda
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Radiated Emission

Confirming the Signal Integrity in Transmission of Digital Signals on Microstrip Straight Circuits via the Eye Diagrams

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Signal Integrity ◽  
High Volume ◽  
Information Storage ◽  
Circuit Board ◽  
Electromagnetic Simulation ◽  
Electronic Systems ◽  
Digital Signals ◽  
Printed Circuit

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.

Root Cause Analysis of a Connector Time-Delayed Fracture

2015 ◽  
Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis
Keyword(s):  
Printed Circuit Board ◽  
Ceramic Substrate ◽  
Circuit Board ◽  
Delayed Fracture ◽  
Ceramic Substrates ◽  
Printed Circuit ◽  
Root Cause ◽  
Chip Carrier ◽  
Electrical Connections ◽  
Grain Boundary Grooves

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.

Application of Lock-in Thermography on PCB for Fault Localization and Validation of Failure Mechanism Due to External Discrete Component Variation

2010 ◽  
Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen
Keyword(s):  
Failure Mechanism ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Hot Spot ◽  
Circuit Board ◽  
Discrete Component ◽  
Printed Circuit ◽  
Thermal Signature ◽  
Lock In

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.

Temperature and Humidity Dependent Reliability Analysis of RGB LED Chips

2006 ◽  
Author(s):  
Jun-Xian Fu ◽  
Shukri Souri ◽  
James S. Harris
Keyword(s):  
Reliability Analysis ◽  
Printed Circuit Board ◽  
Light Emitting Diode ◽  
Circuit Board ◽  
Light Emitting ◽  
Printed Circuit ◽  
Root Cause ◽  
Micro Cracks ◽  
Temperature And Humidity

Abstract Temperature and humidity dependent reliability analysis was performed based on a case study involving an indicator printed-circuit board with surface-mounted multiple-die red, green and blue light-emitting diode chips. Reported intermittent failures were investigated and the root cause was attributed to a non-optimized reflow process that resulted in micro-cracks and delaminations within the molding resin of the chips.

Materials Characterization of Lead Free Compositions for Minimum Temperature SMT Processes at the SLI-Second Level Interconnect Solder Joint

2004 ◽  
Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Gold Surface ◽  
Circuit Board ◽  
Lead Free ◽  
Processing Temperature ◽  
The European Union ◽  
Printed Circuit ◽  
Higher Temperature ◽  
Tin Silver Copper

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.

Magnetic Emission Mapping for Passive Integrated Components Characterisation

2003 ◽  
Author(s):  
O. Crépel ◽  
Y. Bouttement ◽  
P. Descamps ◽  
C. Goupil ◽  
P. Perdu ◽  
...  
Keyword(s):  
Magnetic Field ◽  
Mobile Phone ◽  
Printed Circuit Board ◽  
Magnetic Sensors ◽  
Circuit Board ◽  
Magnetic Disturbance ◽  
Passive Components ◽  
Printed Circuit ◽  
Integrated Inductor ◽  
The Magnetic Field

Abstract We developed a system and a method to characterize the magnetic field induced by circuit board and electronic component, especially integrated inductor, with magnetic sensors. The different magnetic sensors are presented and several applications using this method are discussed. Particularly, in several semiconductor applications (e.g. Mobile phone), active dies are integrated with passive components. To minimize magnetic disturbance, arbitrary margin distances are used. We present a system to characterize precisely the magnetic emission to insure that the margin is sufficient and to reduce the size of the printed circuit board.

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