Analysis of failure of C-V characteristics of MIS structure with SiO2 passivation layer deposited on InSb substrate via Raman spectroscopy

2014 ◽  
Vol 1670 ◽  
Author(s):  
Chulkyun Seok ◽  
Sujin Kim ◽  
Jaeyel Lee ◽  
Sehun Park ◽  
Yongjo Park ◽  
...  
Keyword(s):  
Raman Spectroscopy ◽  
Electrical Properties ◽  
Deposition Temperature ◽  
Silicon Oxide ◽  
Oxide Semiconductor ◽  
Mis Structure ◽  
Metal Insulator ◽  
Capacitance Voltage ◽  
Resonant Raman ◽  
Mos Structures

ABSTRACTThe effect of interfacial phases on the electrical properties of Au/Ti/SiO2/InSb metal-insulator (oxide)-semiconductor (MIS or MOS) structures was investigated by capacitance-voltage (C-V) measurements. With increasing the deposition temperature of silicon oxide from 100 to 350°C using PECVD, the change in the interfacial phases between SiO2 and InSb were analyzed by resonant Raman spectroscopy to verify the relation between the breakdown of C-V characteristics and the change of interfacial phases. The shape of C-V characteristics was dramatically changed when the deposition temperature was above 300°C. The C-V measurements and Raman spectra represented that elemental Sb accumulation resulted from the chemical reaction of Sb oxide with InSb substrate was responsible for the failure in the C-V characteristics of MIS structure.

Electrical Properties of Metal-Oxide-Semiconductor (MOS) Structures on 4H-SiC(0001) Formed by Oxidizing Pre-Deposited SixNy

2007 ◽  
Vol 556-557 ◽  
pp. 647-650 ◽  
Author(s):  
Jeong Hyun Moon ◽  
Dong Hwan Kim ◽  
Ho Keun Song ◽  
Jeong Hyuk Yim ◽  
Wook Bahng ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Metal Oxide ◽  
Current Density ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Field ◽  
Mos Capacitors ◽  
Dielectric Layers ◽  
Capacitance Voltage ◽  
Mos Structures

We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with ultra thin (5 nm) remote-PECVD SixNy dielectric layers and investigated electrical properties of nitrided SiO2/4H-SiC interface after oxidizing the SixNy in dry oxygen at 1150 °C for 30, 60, 90 min. Improvements of electrical properties have been revealed in capacitance-voltage (C-V) and current density-electrical field (J-E) measurements in comparison with dry oxide. The improvements of SiC MOS capacitors formed by oxidizing the pre-deposited SixNy have been explained in this paper.

Radiation Hardness for Silicon Oxide and Aluminum Oxide on 4H-SiC

2018 ◽  
Vol 924 ◽  
pp. 229-232 ◽  
Author(s):  
Anders Hallén ◽  
Sethu Saveda Suvanam
Keyword(s):  
Proton Irradiation ◽  
Silicon Oxide ◽  
Positive Charge ◽  
Gate Dielectric ◽  
Radiation Hardness ◽  
Flat Band ◽  
Capacitance Voltage ◽  
Cv Measurements ◽  
Radiation Hard ◽  
Mos Structures

The radiation hardness of two dielectrics, SiO2and Al2O3, deposited on low doped, n-type 4H-SiC epitaxial layers has been investigated by exposing MOS structures involving these materials to MeV proton irradiation. The samples are examined by capacitance voltage (CV) measurements and, from the flat band voltage shift, it is concluded that positive charge is induced in the exposed structures detectable for fluence above 1×1011cm-2. The positive charge increases with proton fluence, but the SiO2/4H-SiC structures are slightly more sensitive, showing that Al2O3can provide a more radiation hard passivation, or gate dielectric for 4H-SiC devices.

Electrical Properties of the La2O3/4H-SiC Interface Prepared by Atomic Layer Deposition Using La(iPrCp)3 and H2O

2006 ◽  
Vol 527-529 ◽  
pp. 1083-1086 ◽  
Author(s):  
Jeong Hyun Moon ◽  
Da Il Eom ◽  
Sang Yong No ◽  
Ho Keun Song ◽  
Jeong Hyuk Yim ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Atomic Layer Deposition ◽  
Leakage Current ◽  
Interfacial Layer ◽  
Atomic Layer ◽  
Mis Structure ◽  
Al2o3 Layer ◽  
Metal Insulator ◽  
Layer Deposition ◽  
Mis Structures

The La2O3 and Al2O3/La2O3 layers were grown on 4H-SiC by atomic layer deposition (ALD) method. The electrical properties of La2O3 on 4H-SiC were examined using metal-insulator-semiconductor (MIS) structures of Pt/La2O3(18nm)/4H-SiC and Pt/Al2O3(10nm)/La2O3(5nm)/4H-SiC. For the Pt/La2O3(18nm)/4H-SiC structure, even though the leakage current density was slightly reduced after the rapid thermal annealing at 500 oC, accumulation capacitance was gradually increased with increasing bias voltage due to a high leakage current. On the other hand, since the leakage current in the accumulation regime was decreased for the Pt/Al2O3/La2O3/4H-SiC MIS structure owing to the capped Al2O3 layer, the capacitance was saturated. But the saturation capacitance was strongly dependent on frequency, indicating a leaky interfacial layer formed between the La2O3 and SiC during the fabrication process of Pt/Al2O3(10nm)/ La2O3(5nm)/ 4H-SiC structure.

Effects of Substrate Temperature on the Properties of Silicon Oxide Films by PECVD

2012 ◽  
Vol 198-199 ◽  
pp. 28-31
Author(s):  
Chun Ya Li ◽  
Xi Feng Li ◽  
Long Long Chen ◽  
Ji Feng Shi ◽  
Jian Hua Zhang
Keyword(s):  
Thin Film ◽  
Thin Films ◽  
Electrical Properties ◽  
Photoelectron Spectroscopy ◽  
Deposition Temperature ◽  
Silicon Oxide ◽  
Chemical Vapor ◽  
Growth Conditions ◽  
X Ray ◽  
Glass Substrates

Under different growth conditions, silicon Oxide (SiOx) thin films were deposited successfully on Si (100) substrates and glass substrates by plasma enhanced chemical vapor deposition (PECVD). The thickness, refractive index and growth rate of the thin films were tested by ellipsometer. The effects of deposition temperature on the structure and properties of SiOx films were studied using X ray diffraction (XRD), X ray photoelectron spectroscopy (XPS) and UV-Visible spectroscopy. The results show that the SiOx films were amorphous at different deposition temperature. The peaks of Si2p and O1s shifted to higher binding energy with temperature increasing. The SiOx films had high transmissivity at the range of 400-900nm. By analyzing the observation and data, the influence of deposition parameters on the electrical properties and interface characteristics of SiOx thin film prepared by PECVD is systematically discussed. At last, SiOx thin film with excellent electrical properties and good interface characteristic is prepared under the relatively optimum parameters.

Influence of Diverse Post-Trench Processes on the Electrical Performance of 4H-SiC MOS Structures

2014 ◽  
Vol 778-780 ◽  
pp. 595-598 ◽  
Author(s):  
Christian T. Banzhaf ◽  
Michael Grieb ◽  
Achim Trautmann ◽  
Anton J. Bauer ◽  
Lothar Frey
Keyword(s):  
Dielectric Breakdown ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Electrical Performance ◽  
Breakdown Field ◽  
Static Capacitance ◽  
Capacitance Voltage ◽  
Oxide Deposition ◽  
Mos Structures ◽  
Field Strengths

This paper focuses on the evaluation of subsequent process steps (post-trench processes, PTPs) after 4H silicon carbide (4H-SiC) trench etching with respect to the electrical performance of trenched gate metal oxide semiconductor field effect transistors (Trench-MOSFETs). Two different types of PTP were applied after 4H-SiC trench formation, a high temperature post-trench anneal (PTA) [1] and a sacrificial oxidation (SacOx) [2]. We found significantly improved electrical properties of Planar-MOS structures using a SacOx as PTP, prior to gate oxide deposition. Besides excellent quasi-static capacitance-voltage (QSCV) behavior even at T = 250 °C, charge-to-breakdown (QBD) results up to 8.8 C/cm2 at T = 200 °C are shown to be similar on trenched surfaces as well as on untrenched surfaces of SacOx-treated Planar-MOS structures. Moreover, dielectric breakdown field strengths up to 12 MV/cm have been measured on Planar-MOS structures. However, thick bottom oxide Trench-MOS structures indicate best dielectric breakdown field strengths of 9.5 MV/cm when using a trench shape rounding PTA as the PTP.

Impact of Phosphorus Implantation on the Electrical Properties of SiO2/4H-SiC Interfaces Annealed in N2O

2016 ◽  
Vol 858 ◽  
pp. 701-704
Author(s):  
Patrick Fiorenza ◽  
Salvatore di Franco ◽  
Filippo Giannazzo ◽  
Simone Rascunà ◽  
Mario Saggio ◽  
...  
Keyword(s):  
High Temperature ◽  
High Resolution ◽  
Electrical Properties ◽  
Surface Region ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Activation ◽  
Mos Capacitors ◽  
Capacitance Voltage ◽  
Electrical Effect

In this work, the combined effect of a shallow phosphorus (P) pre-implantation and of a nitridation annealing in N2O on the properties of the SiO2/4H-SiC interface has been investigated. The peak carrier concentration and depth extension of the electrically active dopants introduced by the nitridation and by the combination of P pre-implantation and nitridation were determined by high resolution scanning capacitance microscopy (SCM). Macroscopic capacitance-voltage (C-V) measurements on metal oxide semiconductor (MOS) capacitors and nanoscale C-V analyses by SCM allowed to quantify the electrical effect of the donors introduced underneath the SiO2/4H-SiC interface. Phosphorous pre-implantation and subsequent high temperature electrical activation has been shown not only to produce an increased doping in the 4H-SiC surface region but also a better homogeneity of surface potential with respect to the use of N2O annealing only.

Electrical properties of Au/Bi0.5Na0.5TiO3-BaTiO3/n-GaN metal–insulator–semiconductor (MIS) structure

2014 ◽  
Vol 29 (7) ◽  
pp. 075001 ◽  
Author(s):  
V Rajagopal Reddy ◽  
V Janardhanam ◽  
Jin-Woo Ju ◽  
Hyobong Hong ◽  
Chel-Jong Choi
Keyword(s):  
Electrical Properties ◽  
Mis Structure ◽  
Metal Insulator ◽  
Metal Insulator Semiconductor
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