Microstructural characterization of copper metallic deposition by electroplating growth for SIP applications

2011 ◽  
Vol 1288 ◽  
Author(s):  
Céline Durand ◽  
Bernadette Domengès ◽  
Philippe Le Duc
Keyword(s):  
Integrated Circuits ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Chemical Deposition ◽  
Microstructural Characterization ◽  
Copper Metallization ◽  
Heteroepitaxial Growth ◽  
Lower Growth ◽  
Microscopy Imaging

ABSTRACTMicrostructural characterization (Focused Ion Beam and Transmission Electron Microscopy imaging) was performed on cross-sections of contacts in thick Electro Chemical Deposition copper metallization of System In Package Integrated Circuits. It was shown that the lower growth rate of ECD-Cu in the AlSiCu – barrier Ti – PVD-Cu – ECD-Cu layer stacking is related to a local higher resistivity induced by the presence of a great number of almost planar grain boundaries in the PVD-Cu layer, which are perpendicular to the growth axis. This morphology is a consequence of the almost heteroepitaxial growth of Ti layer on AlSiCu layer.

Focused Ion Beam Metrology

1995 ◽  
Vol 396 ◽  
Author(s):  
A. Wagner ◽  
P. Blauner ◽  
P. Longo ◽  
S. Cohen
Keyword(s):  
Integrated Circuits ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Dimensional Change ◽  
Critical Dimension ◽  
Ion Beams ◽  
Near Surface ◽  
Electron Microscopes ◽  
Scanning Electron Microscopes

AbstractFocused Ion Beams offer a new method of measuring the size of polymer resist features on integrated circuits. The short penetration range of an ion relative to an electron is shown to offer fundamental advantages for critical dimension (CD) metrology. By confining the polymer damage to the very near surface, ion beams can induce less dimensional change than scanning electron microscopes during the measurement process. This can result in improved CD measurement precision. The erosion rate of polymers to various ion species is also presented, and we show that erosion is non-linear with ion dose. The use of FIB for forming resist cross sections is also demonstrated. An H20 gas assisted etching process for polymers has been developed, and is shown to significantly improve the quality of resist cross sections.

Direct Imaging of Device Characteristics In a Focused ion Beam System

1998 ◽  
Vol 4 (S2) ◽  
pp. 652-653 ◽  
Author(s):  
A. N. Campbell ◽  
J. M. Soden
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Material Removal ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Yield Enhancement ◽  
The Past ◽  
Design Changes ◽  
Design Debugging

A great deal can be learned about integrated circuits (ICs) and microelectronic structures simply by imaging them in a focused ion beam (FIB) system. FIB systems have evolved during the past decade from something of a curiosity to absolutely essential tools for microelectronics design verification and failure analysis. FIB system capabilities include localized material removal, localized deposition of conductors and insulators, and imaging. A major commercial driver for FIB systems is their usefulness in the design debugging cycle by (1) rewiring ICs quickly to test design changes and (2) making connection to deep conductors to facilitate electrical probing of complex ICs. FIB milling is also used for making precision cross sections and for TEM sample preparation of microelectronic structures for failure analysis and yield enhancement applications.

scholarly journals Die Backside FIB Preparation for Identification and Characterization of Metal Voids

1999 ◽  
Author(s):  
Ann N. Campbell ◽  
William F. Filter ◽  
Nicholas Antoniou
Keyword(s):  
Integrated Circuits ◽  
Failure Analysis ◽  
Cross Sections ◽  
Integrated Circuit ◽  
Flip Chip ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Milling Process ◽  
Plan View ◽  
Metal Interconnects

Abstract Both the increased complexity of integrated circuits, resulting in six or more levels of integration, and the increasing use of flip-chip packaging have driven the development of integrated circuit (IC) failure analysis tools that can be applied to the backside of the chip. Among these new approaches are focused ion beam (FIB) tools and processes for performing chip edits/repairs from the die backside. This paper describes the use of backside FIB for a failure analysis application rather than for chip repair. Specifically, we used FIB technology to prepare an IC for inspection of voided metal interconnects (“lines”) and vias. Conventional FIB milling was combined with a superenhanced gas assisted milling process that uses XeF2 for rapid removal of large volumes of bulk silicon. This combined approach allowed removal of the TiW underlayer from a large number of M1 lines simultaneously, enabling rapid localization and plan view imaging of voids in lines and vias with backscattered electron (BSE) imaging in a scanning electron microscope (SEM). Sequential cross sections of individual voided vias enabled us to develop a 3D reconstruction of these voids. This information clarified how the voids were formed, helping us identify the IC process steps that needed to be changed.

Failure Analysis of Electronic Material Using Cryogenic FIB-SEM

2012 ◽  
Author(s):  
Nicholas Antoniou ◽  
Adam Graham ◽  
Cheryl Hartfield ◽  
Gonzalo Amador
Keyword(s):  
Integrated Circuits ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Bulk Sample ◽  
Copper Metallization ◽  
Cryogenic Temperatures ◽  
Transmission Electron ◽  
Specific Analysis ◽  
Change Chemical Composition

Abstract Two-beam systems (focused ion beam (FIB) integrated with a scanning electron microscope (SEM)) have enabled site-specific analysis at the nano-scale through in situ “mill and view” capability at high resolution. In addition, a FIB-SEM can be used to cut away a lamella from a bulk sample and thin it for transmission electron microscopy (TEM) imaging. We studied the temperature dependence of FIB milling on compound semiconductors and thin films such as copper that are used in integrated circuits. These materials (GaAs, GaN, InN, etc) react chemically and physically with the gallium in the FIB and change chemical composition and may also change morphology. Copper metallization of IC’s has been difficult to mill without undesirable side effects. FIB milling for analysis of these materials becomes difficult if not impossible. Since temperature can be a big factor in chemical and physical reactions we investigated this and report here the effect of cooling the sample to cryogenic temperatures while milling. In addition, we report on the development of a process to prepare TEM lamellae with FIB entirely in a cryogenic environment.

Simulation of Focused Ion Beam Induced Damage Formation in Crystalline Silicon

2003 ◽  
Vol 792 ◽  
Author(s):  
Gerhard Hobler ◽  
Alois Lugstein ◽  
Wolfgang Brezna ◽  
Emmerich Bertagnolli
Keyword(s):  
Integrated Circuits ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Crystalline Silicon ◽  
Ion Beam ◽  
Amorphous Layer ◽  
Binary Collision ◽  
Focused Ion Beams ◽  
Active Devices ◽  
Transmission Electron

ABSTRACTApplication of focused ion beams (FIB) to circuit modification during design and debugging of integrated circuits is limited by the degradation of active devices due to beam induced crystal damage. In order to investigate FIB induced damage formation theoretically, we have extended our 1-D/2-D binary collision (BC) code IMSIL to allow surface movement due to sputtering. In contrast to other dynamic BC codes, the crystal structure of the target and damage generation during implantation may be taken into account. Using this tool we simulate the milling of trenches in the gate stack of MOSFETs and compare the results with transmission electron microscopy cross sections and charge pumping data. The simulations confirm that damage tails are generated that are a factor of two deeper at relevant defect concentrations than expected by conventional BC simulations. This result is shown to be due to recoil channeling in spite of the fact that a beam-induced surface amorphous layer is present throughout the implant. In addition, we discuss the accuracy of the experimental results and the simulations.

An Study of Influence of Imperfections on the Delamination of Diamond-Like Carbon Films

2002 ◽  
Vol 719 ◽  
Author(s):  
Myoung-Woon Moon ◽  
Kyang-Ryel Lee ◽  
Jin-Won Chung ◽  
Kyu Hwan Oh
Keyword(s):  
Cross Sections ◽  
Focused Ion Beam ◽  
Imaging System ◽  
Ion Beam ◽  
Carbon Films ◽  
Diamond Like Carbon ◽  
Glass Substrates ◽  
Atomic Force ◽  
Initiation And Propagation

AbstractThe role of imperfections on the initiation and propagation of interface delaminations in compressed thin films has been analyzed using experiments with diamond-like carbon (DLC) films deposited onto glass substrates. The surface topologies and interface separations have been characterized by using the Atomic Force Microscope (AFM) and the Focused Ion Beam (FIB) imaging system. The lengths and amplitudes of numerous imperfections have been measured by AFM and the interface separations characterized on cross sections made with the FIB. Chemical analysis of several sites, performed using Auger Electron Spectroscopy (AES), has revealed the origin of the imperfections. The incidence of buckles has been correlated with the imperfection length.

Fluorocarbon Precursor for High Aspect Ratio via Milling in Focused Ion Beam Modification of Integrated Circuits

2004 ◽  
Author(s):  
Valery Ray
Keyword(s):  
Side Effects ◽  
Aspect Ratio ◽  
Integrated Circuits ◽  
High Aspect Ratio ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Enabling Technology ◽  
Si Substrate ◽  
Ion Beam Modification ◽  
The Past

Abstract Gas Assisted Etching (GAE) is the enabling technology for High Aspect Ratio (HAR) circuit access via milling in Focused Ion Beam (FIB) circuit modification. Metal interconnect layers of microelectronic Integrated Circuits (ICs) are separated by Inter-Layer Dielectric (ILD) materials, therefore HAR vias are typically milled in dielectrics. Most of the etching precursor gases presently available for GAE of dielectrics on commercial FIB systems, such as XeF2, Cl2, etc., are also effective etch enhancers for either Si, or/and some of the metals used in ICs. Therefore use of these precursors for via milling in dielectrics may lead to unwanted side effects, especially in a backside circuit edit approach. Making contacts to the polysilicon lines with traditional GAE precursors could also be difficult, if not impossible. Some of these precursors have a tendency to produce isotropic vias, especially in Si. It has been proposed in the past to use fluorocarbon gases as precursors for the FIB milling of dielectrics. Preliminary experimental evaluation of Trifluoroacetic (Perfluoroacetic) Acid (TFA, CF3COOH) as a possible etching precursor for the HAR via milling in the application to FIB modification of ICs demonstrated that highly enhanced anisotropic milling of SiO2 in HAR vias is possible. A via with 9:1 aspect ratio was milled with accurate endpoint on Si and without apparent damage to the underlying Si substrate.

FIB Enhancement of Mechanically Polished Cross-sections

2019 ◽  
Author(s):  
Becky Holdford
Keyword(s):  
Electron Microscope ◽  
High Resolution ◽  
Scanning Electron Microscope ◽  
Cross Sections ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
High Resolution Imaging ◽  
Chemical Attack ◽  
Resolution Imaging ◽  
Scanning Electron

Abstract On mechanically polished cross-sections, getting a surface adequate for high-resolution imaging is sometimes beyond the analyst’s ability, due to material smearing, chipping, polishing media chemical attack, etc.. A method has been developed to enable the focused ion beam (FIB) to re-face the section block and achieve a surface that can be imaged at high resolution in the scanning electron microscope (SEM).

Yield Enhancement Study: Process Variation and Design Margins Leading to Timing Issues in the RAM

2000 ◽  
Author(s):  
Srikanth Perungulam ◽  
Scott Wills ◽  
Greg Mekras
Keyword(s):  
Cross Sections ◽  
Digital Signal Processor ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Random Access ◽  
Digital Signal ◽  
Yield Enhancement ◽  
Final Conclusion ◽  
Stage Separation ◽  
Study Process

Abstract This paper illustrates a yield enhancement effort on a Digital Signal Processor (DSP) where random columns in the Static Random Access Memory (SRAM) were found to be failing. In this SRAM circuit, sense amps are designed with a two-stage separation and latch sequence. In the failing devices the bit line and bit_bar line were not separated far enough in voltage before latching got triggered. The design team determined that the sense amp was being turned on too quickly. The final conclusion was that a marginal sense amp design, combined with process deviations, would result in this type of failure. The possible process issues were narrowed to variations of via resistances on the bit and bit_bar lines. Scanning Electron Microscope (SEM) inspection of the the Focused Ion Beam (FIB) cross sections followed by Transmission Electron Microscopy (TEM) showed the presence of contaminants at the bottom of the vias causing resistance variations.

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