Electronic Structure and Band Offsets of High-Dielectric-Constant Gate Oxides

MRS Bulletin ◽  
2002 ◽  
Vol 27 (3) ◽  
pp. 217-221 ◽  
Author(s):  
John Robertson
Keyword(s):  
Dielectric Constant ◽  
Electronic Structure ◽  
Gate Dielectric ◽  
Complementary Metal Oxide Semiconductor ◽  
Band Alignment ◽  
Oxide Semiconductor ◽  
Materials Properties ◽  
Modeling Approach ◽  
High Dielectric ◽  
Physical And Chemical

AbstractIdentifying candidate materials to replace SiO2 as the gate dielectric for complementary metal oxide semiconductor (CMOS) applications is a difficult task. Proper assessment of the critical materials requirements is essential, and it is important to devise an approach to predict materials properties without having to make many unnecessary measurements on high-ĸ materials. Such an approach helps to eliminate unlikely candidates and focus on the most promising ones. Clearly, this type of modeling approach requires an understanding of several physical and chemical characteristics, including the bonding and electronic structure, band alignment with Si, and the nature of the dielectric constant and interface properties. We present a critical assessment of some existing methods and models of materials properties, as well as a comparison of the present modeling approach with some experimentally determined values.

scholarly journals STRUCTURAL AND ELECTRICAL PROPERTIES OF TANTALUM PENTAOXIDE (Ta2O5) THIN FILMS – A REVIEW

2013 ◽  
Vol 22 ◽  
pp. 564-569
Author(s):  
KANTA RATHEE ◽  
B. P. MALIK
Keyword(s):  
Thin Films ◽  
Dielectric Constant ◽  
Electrical Properties ◽  
Metal Oxide ◽  
High Dielectric Constant ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Structural And Electrical Properties ◽  
High Dielectric ◽  
Deposited Films

Down scaling of complementary metal oxide semiconductor transistors has put limitations on silicon dioxide to be used as an effective dielectric. It is necessary to replace the SiO 2 with a physically thicker layer of oxides of high dielectric constant. Thus high k dielectrics are used to suppress the existing challenges for CMOS scaling. Many new oxides are being evaluated as gate dielectrics such as Ta2O5 , HfO2 , ZrO2 , La2O3 , HfO2 , TiO2 , Al2O3 , Y2O3 etc but it was soon found that these oxides in many respects have inferior electronic properties to SiO2 . But the the choice alone of suitable metal oxide with high dielectric constant is not sufficient to overcome the scaling challenges. The various deposition techniques and the conditions under which the thin films are deposited plays important role in deciding the structural and electrical properties of the deposited films. This paper discusses in brief the various deposition conditions which are employed to improve the structural and electrical properties of the deposited films.

Process Improvements for Reductions in Total Charge and Interface Trap Densities of Thermally-Grown Sub-3.5nm-Thick Silicon Nitrides

1999 ◽  
Vol 592 ◽  
Author(s):  
Sanjit Singh Dang ◽  
Christos G. Takoudis
Keyword(s):  
Silicon Nitride ◽  
Gate Dielectric ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Trap ◽  
Total Charge ◽  
Process Improvements ◽  
Silicon Nitride Films ◽  
High Dielectric ◽  
Thermally Grown

ABSTRACTUltra-thin silicon nitride films are being studied for use as high-dielectric constant (highk) materials in future gate dielectric applications, as Complementary Metal-Oxide-Semiconductor (CMOS) transistors are scaled down to the sub-100nm regime. In this study, process modifications are proposed to reduce the total charge and interface trap densities in sub-3.5 nm-thick silicon nitride films, grown in NH3, in a conventional furnace at 900°C and 1 atm. It is shown that by employing a short (<1 min) oxynitridation step in NO, before nitridation, and oxynitridation/Ar-annealing steps, after nitridation, silicon nitride films can be thermally grown with a total charge density as low as about 2.5E10 q/cm2 and an interface trap density of about 2.1E11/(eV-cm2). Besides, the effect of using NO as opposed to N2O for oxynitridation steps is also discussed.

scholarly journals Research Progress of High Dielectric Constant Zirconia-Based Materials for Gate Dielectric Application

Coatings ◽  
2020 ◽  
Vol 10 (7) ◽  
pp. 698
Author(s):  
Junan Xie ◽  
Zhennan Zhu ◽  
Hong Tao ◽  
Shangxiong Zhou ◽  
Zhihao Liang ◽  
...  
Keyword(s):  
Thin Film ◽  
Dielectric Constant ◽  
Electrical Properties ◽  
High Dielectric Constant ◽  
Gate Dielectric ◽  
Semiconductor Device ◽  
Dielectric Materials ◽  
Oxide Semiconductor ◽  
Research Progress ◽  
High Dielectric

The high dielectric constant ZrO2, as one of the most promising gate dielectric materials for next generation semiconductor device, is expected to be introduced as a new high k dielectric layer to replace the traditional SiO2 gate dielectric. The electrical properties of ZrO2 films prepared by various deposition methods and the main methods to improve their electrical properties are introduced, including doping of nonmetal elements, metal doping design of pseudo-binary alloy system, new stacking structure, coupling with organic materials and utilization of crystalline ZrO2 as well as optimization of low-temperature solution process. The applications of ZrO2 and its composite thin film materials in metal oxide semiconductor field effect transistor (MOSFET) and thin film transistors (TFTs) with low power consumption and high performance are prospected.

scholarly journals Current Tunnelling in MOS Devices with Al2O3/SiO2 Gate Dielectric

2008 ◽  
Vol 2008 ◽  
pp. 1-5 ◽  
Author(s):  
A. Bouazra ◽  
S. Abdi-Ben Nasrallah ◽  
M. Said ◽  
A. Poncet
Keyword(s):  
Dielectric Constant ◽  
Gate Dielectric ◽  
Oxide Thickness ◽  
Gate Leakage ◽  
Mos Devices ◽  
High K ◽  
Carrier Trap ◽  
High Dielectric ◽  
Very High ◽  
Tunnelling Current

With the continued scaling of the SiO2 thickness below 2 nm in CMOS devices, a large direct-tunnelling current flow between the gate electrode and silicon substrate is greatly impacting device performance. Therefore, higher dielectric constant materials are desirable for reducing the gate leakage while maintaining transistor performance for very thin dielectric layers. Despite its not very high dielectric constant (∼10), Al2O3 has emerged as one of the most promising high-k candidates in terms of its chemical and thermal stability as its high-barrier offset. In this paper, a theoretical study of the physical and electrical properties of Al2O3 gate dielectric is reported including I(V) and C(V) characteristics. By using a stack of Al2O3/SiO2 with an appropriate equivalent oxide thickness of gate dielectric MOS, the gate leakage exhibits an important decrease. The effect of carrier trap parameters (depth and width) at the Al2O3/SiO2 interface is also discussed.

On the Electrical Characterization of High-ĸ Dielectrics

MRS Bulletin ◽  
2002 ◽  
Vol 27 (3) ◽  
pp. 222-225 ◽  
Author(s):  
R. Degraeve ◽  
E. Cartier ◽  
T. Kauerauf ◽  
R. Carter ◽  
L. Pantisano ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electrode Materials ◽  
Gate Dielectric ◽  
Electrical Characterization ◽  
Complementary Metal Oxide Semiconductor ◽  
Dielectric Materials ◽  
Oxide Semiconductor ◽  
High Q ◽  
New Si

AbstractThe continual scaling of complementary metal oxide semiconductor (CMOS) technologies has pushed the Si-SiO2 system to its very limits and has led to the consideration of a number of alternative high-ĸ gate dielectric materials. In the end, it will be the electrical properties of the new Si/high-ĸ system that will determine its usefulness in future CMOS generations. For this reason, the study of the electrical properties of high-ĸ gate insulators is crucial. We present an overview of some of the electrical characterization techniques and reliability tests used to evaluate possible high-ĸ gate materials. Most of these techniques are well known from the characterization of SiO2 layers, but there are some additional complications, such as the presence of several different layers within one gate stack or the use of different gate electrode materials. These make the interpretation and comparison of experimental results more troublesome.

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