Electrolyzed Water as an Alternative for Environmentally Benign Semiconductor Cleaning

2002 ◽  
Vol 17 (6) ◽  
pp. 1298-1304 ◽  
Author(s):  
Kunkul Ryoo ◽  
Byeongdoo Kang ◽  
Osao Sumita

The present semiconductor cleaning technology is based upon RCA cleaning [W. Kern and D.A. Puotinen, Cleaning Solutions Based on Hydrogen Peroxide for use in Silicon Semiconductor Technology (RCA Rev., 1970) pp. 187–206], a high-temperature process that consumes vast amounts of chemicals and ultrapure water (UPW) [T. Futatsuki, T. Imaoka, Y. Yamashita, and K. Mitsumori, J. Electrochem. Soc., 142, 966 (1995)]. Therefore, this technology gives rise to many environmental issues, and some alternatives such as electrolyzed water (EW) are being studied. In this work, intentionally contaminated Si wafers were cleaned using electrolyzed water. The electrolyzed water was generated by an electrolysis system that consists of anode, cathode, and middle chambers. Oxidative water and reductive water were obtained in the anode and cathode chambers, respectively. When a NH4Cl electrolyte was supplied in the middle chamber, the oxidation–reduction potential and pH for anode water (AW) and cathode water (CW) were +1050 mV and 4.8, and −750 mV and 10.0, respectively. AW and CW deterioriated after electrolysis but maintained their characteristics for more than 40 min, which was sufficient for cleaning. Their deterioration was correlated with CO2 concentration changes dissolved from air. Contact angles of UPW, AW, and CW on DHF-treated Si wafer surfaces were 65.9°, 66.5°, and 56.8°, respectively, which characterizes clearly the electrolyzed water. To analyze the amount of metallic impurities on Si wafer surface, inductively coupled plasma, mass spectroscopy was introduced. AW was effective for Cu removal, while CW was more effective for Fe removal. To analyze the number of particles on Si wafer surfaces, we used the particle measurement Tencor 6220. The particle distributions after various particle removal processes maintained the same pattern. Overflow of EW during cleaning particles resulted in the same cleanness as that obtained with the RCA cleaning process. The roughness of patterned wafer surfaces after EW cleaning was similar to that of as-received wafers. Regardless of process sequence in this work, RCA consumed about 9 l of chemicals, while EW consumed only 400 ml HCl electrolyte or 600 ml NH4Cl electrolyte to clean 8-in. wafers. It was thus concluded that EW cleaning technology would be very effective for releasing environmental safety, and health issues in the next generation of semiconductor manufacturing.

2001 ◽  
Vol 671 ◽  
Author(s):  
Kunkul Ryoo ◽  
Byeongdoo Kang

ABSTRACTA present semiconductor cleaning technology is based upon RCA cleaning technology which consumes vast amounts of chemicals and ultra pure water(UPW) and is the high temperature process. Therefore, this technology gives rise to the many environmental issues, and some alternatives such as functional water cleaning are being studied. The electrolyzed water was generated by an electrolysis system which consists of anode, cathode, and middle chambers. Oxidative water and reductive water were obtained in anode and cathode chambers, respectively. In case of NH4Clelectrolyte, the oxidation-reduction potential and pH for anode water(AW) and cathode water(CW) were measured to be +1050mV and 4.8, and -750mV and 10.0, respectively. AW and CW were deteriorated after electrolyzed, but maintained their characteristics for more than 40 minutes sufficiently enough for cleaning. Their deterioration was correlated with CO2 concentration changes dissolved from air. It was known that AW was effective for Cu removal, while CW was more effective for Fe removal. The particle distributions after various particle removal processes maintained the same pattern. In this work, RCA consumed about 9 chemicals, while EW did only 400ml HCl electrolyte or 600ml NH4Cl electrolyte. It was hence concluded that EW cleaning technology would be very effective for eliminating environment, safety, and health(ESH) issues in the next generation semiconductor manufacturing.


Author(s):  
Kamlesh Joshi ◽  
Pradeep Padhamnath ◽  
Upendra Bhandarkar ◽  
Suhas S. Joshi

Abstract In the past, studies on wire-electrical discharge machining (EDM) of Si wafers have often focused on the effect of energy-related parameters on various wafer characteristics. However, comprehensive treatment on analyzing the effect of non-energy parameters of the Si wafer slicing process is not available thus far. This work, therefore, presents an extensive experimental work considering the parameters like wire tension (WT), wire feed rate (WF), and dielectric flushing pressure (WaP) on crucial wafer characteristics such as wafer-thickness and its uniformity, thermal damage, wire material contamination on wafer surfaces, and surface quality. A total of 72 experiments were performed at low and high servo voltage (SV) conditions. The sliced wafers were characterized by SEM, EDAX, and ICP-AES techniques. Ultrathin wafers with a uniform thickness of ∼107 µm were sliced at high SV conditions, while a lower thermal damage (∼10 µm) with low wire contamination was observed during low SV conditions. The percentage of contamination was further found to decrease with an increase in WT, WF, and WaP during low SV conditions. The wafer surface etching showed the diffusion of contaminates like Cu/Zn up to a depth of 25–30 µm. The wafer surface roughness in the middle section has always been observed to be poor due to short-circuiting and arcing within that zone.


1995 ◽  
Vol 386 ◽  
Author(s):  
N. Takenaka ◽  
Y. Satoh ◽  
A. Ishihama ◽  
K. Sakiyama

ABSTRACTThe surface cleaning technology with the use of ice scrubber cleaning has been developed to remove the particles after Chemical Mechanical Polishing (CMP) process. The ice particles with a high speed nearly equal to the sound velocity bombarded the Si wafer surface, as a result, the residue from the slurry solution was reduced from ∼5/cm2 to ∼0.05/cm2 and the metal impurities are completely eliminated below the defect limitation for ICP mass spectroscopy. The charge build-up damage due to the high speed particles is not introduced into the the MOS capacitors. This technology is quite effective, compared with the conventional brush scrubber method and is applicable for the cleaning process below the quarter micron devices.


2021 ◽  
Vol 314 ◽  
pp. 247-252
Author(s):  
Juhwan Kim ◽  
Seokjun Hong ◽  
Chulwoo Bae ◽  
Yutaka Wada ◽  
Hirokuni Hiyama ◽  
...  

In chemical mechanical planarization (CMP) processes, ceria is generally used as the abrasive . After the CMP process, many ceria particles adhere to the wafer surface and must be removed prior to subsequent processing. In this study, the effect of varied viscosity was investigated during the buffing CMP process for ceria particle removal. After contaminating the wafer surface with ceria slurry, the ceria particles were removed through the buffing CMP process. The wafer surface was analyzed through inductively coupled plasma mass spectrometry (ICP-MS) to confirm cleaning efficiency. The ICP-MS data showed that, as buffing CMP solution viscosity increased, cleaning efficiency improved. These results suggest that increasing the viscosity of the buffing CMP solution improves its effectiveness in removing ceria particles.


2012 ◽  
Vol 497 ◽  
pp. 137-141 ◽  
Author(s):  
Wen Jian Lu ◽  
Yuki Shimizu ◽  
Wei Gao

A thermal-type contact sensor was proposed to detect small defects, the heights of which are less than 16 nm, on the wafer surface. The feasibility of the contact sensor, which detects frictional heat generated at the contact, was theoretically investigated focusing on the temperature rise of the sensor element. Simulation results with both the simple model of heat transfer and the FEM model showed that the expected temperature rise of the contact sensor is enough to be detected by the conventional electric circuit.


2008 ◽  
Vol 389-390 ◽  
pp. 493-497 ◽  
Author(s):  
Sung Chul Hwang ◽  
Jong Koo Won ◽  
Jung Taik Lee ◽  
Eun Sang Lee

As the level of Si-wafer surface directly affects device line-width capability, process latitude, yield, and throughput in fabrication of microchips, it needs to have ultra precision surface and flatness. Polishing is one of the important processing having influence on the surface roughness in manufacturing of Si-wafers. The surface roughness in wafer polishing is mainly affected by the many process parameters. For decreasing the surface roughness, the control of polishing parameters is very important. In this paper, the optimum condition selection of ultra precision wafer polishing and the effect of polishing parameters on the surface roughness were evaluated by the statistical analysis of the process parameters.


2006 ◽  
Vol 72 (11) ◽  
pp. 1363-1367
Author(s):  
Haruyuki INOUE ◽  
Toshihiko KATAOKA ◽  
Yoshihiro NAGAO ◽  
Yasushi OSHIKANE ◽  
Motohiro NAKANO ◽  
...  

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