Effects of Various Cleaning Methods on Electronic Components in the Micromodule

2009 ◽  
pp. 254-254-7
Author(s):  
J. L. Vossen
Author(s):  
C.M. Sung ◽  
M. Levinson ◽  
M. Tabasky ◽  
K. Ostreicher ◽  
B.M. Ditchek

Directionally solidified Si/TaSi2 eutectic composites for the development of electronic devices (e.g. photodiodes and field-emission cathodes) were made using a Czochralski growth technique. High quality epitaxial growth of silicon on the eutectic composite substrates requires a clean silicon substrate surface prior to the growth process. Hence a preepitaxial surface cleaning step is highly desirable. The purpose of this paper is to investigate the effect of surface cleaning methods on the epilayer/substrate interface and the characterization of silicon epilayers grown on Si/TaSi2 substrates by TEM.Wafers were cut normal to the <111> growth axis of the silicon matrix from an approximately 1 cm diameter Si/TaSi2 composite boule. Four pre-treatments were employed to remove native oxide and other contaminants: 1) No treatment, 2) HF only; 3) HC1 only; and 4) both HF and HCl. The cross-sectional specimens for TEM study were prepared by cutting the bulk sample into sheets perpendicular to the TaSi2 fiber axes. The material was then prepared in the usual manner to produce samples having a thickness of 10μm. The final step was ion milling in Ar+ until breakthrough occurred. The TEM samples were then analyzed at 120 keV using the Philips EM400T.


Author(s):  
Luís Henrique Carnevale da Cunha ◽  
Gustavo Rabello dos Anjos ◽  
Norberto Mangiavacchi

Alloy Digest ◽  
1975 ◽  
Vol 24 (9) ◽  

Abstract BERYLCO NICKEL ALLOY 440 is an age-hardenable nickel-beryllium-titanium alloy that offers high strength, excellent spring properties outstanding formability, good high-temperature mechanical properties, and resistance to corrosion and fatigue. Complex shapes can be produced in the solution-treated (soft) condition and then aged to a minimum tensile strength of 215,500 psi. It is used for mechanical and electrical/electronic components in the temperature range -320 to 800 F. This datasheet provides information on composition, physical properties, hardness, elasticity, and tensile properties as well as fracture toughness. It also includes information on high temperature performance and corrosion resistance as well as forming, heat treating, machining, joining, and surface treatment. Filing Code: Ni-94. Producer or source: Kawecki Berylco Industries Inc.. Originally published September 1964, revised September 1975.


Alloy Digest ◽  
2006 ◽  
Vol 55 (4) ◽  

Abstract HPM 233 is a wrought nickel with low carbon. The alloy is used in electrical and electronic components. This datasheet provides information on composition, physical properties, elasticity, and tensile properties. It also includes information on corrosion resistance as well as forming, heat treating, machining, and joining. Filing Code: Ni-635. Producer or source: Hamilton Precision Metals.


Author(s):  
Anil Kurella ◽  
Aravind Munukutla ◽  
J.S. Lewis

Abstract PCB surface finishes like Immersion silver (ImAg) are commonly used in Pb-free manufacturing environments following RoHS legislation. With this transition, however the numbers of field failures associated with electrochemical migration, copper sulphide corrosion, via barrel galvanic corrosion are on a steady rise. More often than not ImAg surfaces seem to assist these failing signatures. As computers penetrate into emerging markets with humid and industrialized environments there is a greater concern on the reliability and functionality of these electronic components.


2018 ◽  
Author(s):  
Lo Chea Wee ◽  
Tan Sze Yee ◽  
Gan Sue Yin ◽  
Goh Cin Sheng

Abstract Advanced package technology often includes multi-chips in one package to accommodate the technology demand on size & functionality. Die tilting leads to poor device performance for all kinds of multi-chip packages such as chip by chip (CbC), chip on chip (CoC), and the package with both CbC and CoC. Traditional die tilting measured by optical microscopy and scanning electron microscopy has capability issue due to wave or electron beam blocking at area of interest by electronic components nearby. In this paper, the feasibility of using profilemeter to investigate die tilting in single and multi-chips is demonstrated. Our results validate that the profilemeter is the most profound metrology for die tilting analysis especially on multi-chip packages, and can achieve an accuracy of &lt;2μm comparable to SEM.


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