scholarly journals A first single-photon avalanche diode fabricated in standard SOI CMOS technology with a full characterization of the device

2015 ◽  
Vol 23 (10) ◽  
pp. 13200 ◽  
Author(s):  
Myung-Jae Lee ◽  
Pengfei Sun ◽  
Edoardo Charbon
Keyword(s):  
Single Photon ◽  
Cmos Technology ◽  
Avalanche Diode ◽  
Full Characterization ◽  
Soi Cmos

Scaling trends of single-photon avalanche diode arrays in nanometer CMOS technology

2011 ◽  
Author(s):  
Justin A. Richardson ◽  
Eric A. G. Webster ◽  
Lindsay A. Grant ◽  
Robert K. Henderson
Keyword(s):  
Single Photon ◽  
Cmos Technology ◽  
Avalanche Diode ◽  
Nanometer Cmos

A low dark count rate single photon avalanche diode with standard 180 nm CMOS technology

2019 ◽  
Vol 33 (09) ◽  
pp. 1950099
Author(s):  
Wei Wang ◽  
Guang Wang ◽  
Hongan Zeng ◽  
Yuanyao Zhao ◽  
U-Fat Chio ◽  
...  
Keyword(s):  
Count Rate ◽  
Detection Efficiency ◽  
Single Photon ◽  
Cmos Technology ◽  
Uniform Electric Field ◽  
Avalanche Breakdown ◽  
Guard Ring ◽  
Dark Count ◽  
Avalanche Diode ◽  
Dark Count Rate

A single photon avalanche diode (SPAD) structure designed with standard 180 nm CMOS technology is investigated in detail. The SPAD employs a [Formula: see text]-well anode, rather than the conventional [Formula: see text] layer, and with a [Formula: see text]-well/deep [Formula: see text]-well junction with square shape, a deep retrograde [Formula: see text]-well virtual guard ring which prevents the premature edge avalanche breakdown. The analytical and simulation results show that the SPAD exhibits a uniform electric field distribution in [Formula: see text]-well/deep [Formula: see text]-well junction with the active area of [Formula: see text], and the avalanche breakdown voltage is as low as 9 V, the peak of the photon detection efficiency (PDE) is about 33% at 500 nm, the relatively low dark count rate (DCR) of 0.66 KHz at room temperature is obtained.

RF characterization of metal T-gate structure in fully-depleted SOI CMOS technology

2003 ◽  
Vol 24 (4) ◽  
pp. 251-253 ◽  
Author(s):  
Sang Lam ◽  
Hui Wan ◽  
Pin Su ◽  
P.W. Wyatt ◽  
C.L. Chen ◽  
...  
Keyword(s):  
Cmos Technology ◽  
Fully Depleted ◽  
Gate Structure ◽  
Soi Cmos

scholarly journals High-Performance Back-Illuminated Three-Dimensional Stacked Single-Photon Avalanche Diode Implemented in 45-nm CMOS Technology

2018 ◽  
Vol 24 (6) ◽  
pp. 1-9 ◽  
Author(s):  
Myung-Jae Lee ◽  
Augusto Ronchini Ximenes ◽  
Preethi Padmanabhan ◽  
Tzu-Jui Wang ◽  
Kuo-Chin Huang ◽  
...  
Keyword(s):  
High Performance ◽  
Single Photon ◽  
Three Dimensional ◽  
Cmos Technology ◽  
Avalanche Diode ◽  
Back Illuminated

scholarly journals Characterization of electronic displays using CMOS single-photon avalanche diode image sensors

2018 ◽  
Vol 26 (4) ◽  
pp. 255-261 ◽  
Author(s):  
Hanning Mai ◽  
Istvan Gyongy ◽  
Neale A.W. Dutton ◽  
Robert K. Henderson ◽  
Ian Underwood
Keyword(s):  
Single Photon ◽  
Image Sensors ◽  
Avalanche Diode ◽  
Electronic Displays
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