scholarly journals Electronically Tunable Current-mode High-order Ladder Low-pass Filters Based on CMOS Technology

2015 ◽  
Vol 24 (4) ◽  
pp. 974-987 ◽  
Author(s):  
T. Kunto ◽  
P. Prommee ◽  
M. T. Abuelma'atti
Keyword(s):  
Current Mode ◽  
Cmos Technology ◽  
High Order ◽  
Low Pass ◽  
Electronically Tunable ◽  
Low Pass Filters

scholarly journals 1.0 V-0.18 µm CMOS Tunable Low Pass Filters with 73 dB DR for On-Chip Sensing Acquisition Systems

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 563
Author(s):  
Jorge Pérez-Bailón ◽  
Belén Calvo ◽  
Nicolás Medrano
Keyword(s):  
Power Consumption ◽  
Dynamic Range ◽  
Low Voltage ◽  
Cutoff Frequency ◽  
Cmos Technology ◽  
Active Area ◽  
Current Steering ◽  
Low Pass ◽  
On Chip ◽  
Low Pass Filters

This paper presents a new approach based on the use of a Current Steering (CS) technique for the design of fully integrated Gm–C Low Pass Filters (LPF) with sub-Hz to kHz tunable cut-off frequencies and an enhanced power-area-dynamic range trade-off. The proposed approach has been experimentally validated by two different first-order single-ended LPFs designed in a 0.18 µm CMOS technology powered by a 1.0 V single supply: a folded-OTA based LPF and a mirrored-OTA based LPF. The first one exhibits a constant power consumption of 180 nW at 100 nA bias current with an active area of 0.00135 mm2 and a tunable cutoff frequency that spans over 4 orders of magnitude (~100 mHz–152 Hz @ CL = 50 pF) preserving dynamic figures greater than 78 dB. The second one exhibits a power consumption of 1.75 µW at 500 nA with an active area of 0.0137 mm2 and a tunable cutoff frequency that spans over 5 orders of magnitude (~80 mHz–~1.2 kHz @ CL = 50 pF) preserving a dynamic range greater than 73 dB. Compared with previously reported filters, this proposal is a competitive solution while satisfying the low-voltage low-power on-chip constraints, becoming a preferable choice for general-purpose reconfigurable front-end sensor interfaces.

Improved Electronically-Tunable Current-Mode Square-Root-Domain First-Order Multifunction Filter

2021 ◽  
pp. 2150190
Author(s):  
Manoj Kumar Jain
Keyword(s):  
Transient Response ◽  
Current Mode ◽  
Square Root ◽  
Spice Simulation ◽  
First Order ◽  
Low Pass ◽  
Multifunction Filter ◽  
Simulation Results ◽  
Electronically Tunable ◽  
High Pass

Some time back, Kircay reported an electronically-tunable current-mode square-root-domain first-order filter capable of realizing low-pass (LP), high-pass (HP) and all-pass (AP) filter functions. When simulated in SPICE, Kircay’s circuit has been found to exhibit DC offsets in case of LP and AP responses and incorrect transient response in case of HP response. In this paper, an improved circuit overcoming these difficulties/deficiencies has been suggested and its workability of the improved circuit as well as its capability in meeting the intended objectives has been demonstrated by SPICE simulation results.

An Active-C Current-Mode Universal First-Order Filter and Oscillator

2019 ◽  
Vol 28 (13) ◽  
pp. 1950219 ◽  
Author(s):  
D. Agrawal ◽  
S. Maheshwari
Keyword(s):  
Transfer Functions ◽  
Current Mode ◽  
Cmos Technology ◽  
Monte Carlo Analysis ◽  
Passive Element ◽  
First Order ◽  
Order Filter ◽  
Sinusoidal Oscillator ◽  
High Output Impedance ◽  
Electronically Tunable

This paper presents an electronically tunable current-mode first-order universal filter. The proposed circuit employs only a single Extra-X Current-Controlled Conveyor (EX-CCCII) and a single grounded capacitor, which is suitable for IC implementation. The circuit can realize three current transfer functions simultaneously, namely low-pass, high-pass and all-pass. The proposed circuit exhibits low-input and high-output impedance, which is suitable for cascading. The pole frequency of the filter can be electronically tuned, by varying the bias current of EX-CCCII. The nonidealities and parasitic effects on the circuit performance are investigated in detail. Also, the Monte Carlo analysis is done to show the effect of active and passive element mismatches on the pole frequency. An eight-phase current-mode sinusoidal oscillator and current-mode second-order filter are further realized using the proposed circuit. The functionality of the proposed circuits is verified through PSPICE simulations, using 0.25-[Formula: see text]m TSMC CMOS technology parameters.

MIXED MODE UNIVERSAL FILTER

2013 ◽  
Vol 22 (01) ◽  
pp. 1250064 ◽  
Author(s):  
NEETA PANDEY ◽  
SAJAL K. PAUL
Keyword(s):  
Mixed Mode ◽  
Cmos Technology ◽  
Output Impedance ◽  
Universal Filter ◽  
Output Current ◽  
Voltage Signal ◽  
Low Pass ◽  
Band Pass ◽  
Electronically Tunable ◽  
High Pass

The configuration with electronic tunable characteristics that can work in mixed mode may be useful from IC realization viewpoint and application adaptability. This paper proposes an electronically tunable mixed mode universal filter based on multiple output current controlled current conveyor (MOCCCII) and this single topology without any alteration can be used in all four modes i.e., voltage (VM), current (CM), transimpedance (TIM) and transadmittance (TAM). The architecture uses four MOCCCIIs and two grounded capacitors; and can realize universal filter functions — low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP) for all four modes. Moreover the input impedance is high and output impedance is low for voltage signal and vice-versa for current signal, hence the proposed topology is suitable for cascading for all four modes. The workability of the proposed circuit has been verified via SPICE simulations using AMS 0.35 μm CMOS technology.

Electronically-Tunable Current-Mode Biquad Design Using MO-OTAs

2016 ◽  
Vol 25 (09) ◽  
pp. 1650107 ◽  
Author(s):  
Ali Kircay ◽  
Selim Borekci
Keyword(s):  
Quality Factor ◽  
Current Mode ◽  
Center Frequency ◽  
Total Power ◽  
Operational Transconductance Amplifiers ◽  
Single Output ◽  
Low Pass ◽  
Band Pass ◽  
Electronically Tunable ◽  
Dc Current

In this paper, electronically-tunable, current-mode biquad is proposed by using multiple-output operational transconductance amplifiers (MO-OTAs). The proposed circuit has one input and two outputs. Without changing the circuit topology, low-pass (LP), and band-pass (BP) responses can be realized. The filter is realized by using two MO-OTAs, a single-output OTA (SO-OTA), a two-output OTA and two grounded capacitors. The biquad is designed based on first-order LP filter or lossy integrator blocks. The feedback block is applied to the filter circuit in order to obtain high quality factor values greater than 1/2. The center frequency and the quality factor of the LP and BP filters can be electronically tuned by DC current of OTAs. The total power dissipation of the proposed biquad is approximately 10[Formula: see text]mW at [Formula: see text][Formula: see text]V supplied voltage. The theoretical analysis is also confirmed with SPICE simulations.

scholarly journals Grounded Impedance Simulator Topologies Employing Minimum Passive Elements

2018 ◽  
Vol 7 (2.28) ◽  
pp. 1 ◽  
Author(s):  
Mohammad Faseehuddin ◽  
Jahariah Sampe ◽  
Sawal Hamid Md Ali
Keyword(s):  
Current Mode ◽  
Cmos Technology ◽  
Passive Component ◽  
Passive Components ◽  
Theoretical Predictions ◽  
Low Pass ◽  
Multifunction Filter ◽  
Component Matching ◽  
Order Butterworth Filter ◽  
Matching Constraints

In this research three new grounded inductance simulators (GIS) are proposed. In addition, frequency dependent negative resistor (FDNR) and grounded capacitor (GC) simulators are also developed. The voltage differencing current conveyor (VDCC) is utilized in the design. All the developed simulator circuits need a single active block and only two grounded passive components. All the designed simulator circuits are perfectly tunable and did not suffer from passive component matching constraints. To demonstrate the performance of the inductor, FDNR and GC circuits they are employed in designing  current mode parallel RLC multifunction filter, low pass third order Butterworth filter and RLC resonance circuits. The VDCC is designed in 0.18μm CMOS technology parameters from TSMC and simulated in P-Spice software to prove the theoretical predictions. 

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