Fault-Tolerant Approach to the Con˜guration of Programmable Logic at the Nanoscale

2011 ◽  
pp. 420-471
Keyword(s):  
Fault Tolerant ◽  
Programmable Logic

scholarly journals A Novel Defect Tolerance Scheme for Nanocrossbar Architectures with Enhanced Efficiency

Micromachines ◽  
2018 ◽  
Vol 10 (1) ◽  
pp. 14
Author(s):  
Devisree Sasikumar ◽  
Anand Kumar
Keyword(s):  
Fault Tolerance ◽  
Yield Loss ◽  
Fault Tolerant ◽  
Semiconductor Industry ◽  
Programmable Logic ◽  
Defect Tolerance ◽  
New Materials ◽  
Manufacturing Method ◽  
Well Design ◽  
External Intervention

The semiconductor industry is now facing challenges to keep pace with Moore’s law and this leads to the requirement of new materials and newer technological devices. Molecular switch-based nanodevices are one of the promising areas because of their ultimate size and miniaturisation potential. These nanodevices are built through a self-assembled bottom-up manufacturing method in which the possibility of external intervention is negligible. This leads to a considerable yield loss due to defective device production and the traditional test-and-throw faulty device approach will not hold well. Design of fault-tolerant devices are the only possible solution. A widely studied nanodevice is nanocrossbar architectures and their fault tolerance can be designed by exploiting the programmable logic array’s fault tolerance schemes. A defect-unaware fault tolerance scheme is developed in this work based on the bipartite graph analogy of crossbar architectures. The newly-designed algorithm can eliminate more than one node in each iteration and, hence, a defect-free subcrossbar can be obtained much faster compared to the existing algorithms. A comparison with the existing defect-unaware fault-tolerant methods with this newly-developed algorithm shows a better yield in most of the cases.

scholarly journals Fault-Tolerant FPGA: Architectures and Design for Programmable Logic Intellectual Property Core in SoC

2015 ◽  
Vol E98.D (2) ◽  
pp. 252-261 ◽  
Author(s):  
Motoki AMAGASAKI ◽  
Qian ZHAO ◽  
Masahiro IIDA ◽  
Morihiro KUGA ◽  
Toshinori SUEYOSHI
Keyword(s):  
Intellectual Property ◽  
Fault Tolerant ◽  
Programmable Logic
Sign in / Sign up

Export Citation Format

Share Document