Realistic yield-evaluation of fault-tolerant programmable logic arrays

IEEE Transactions on Reliability ◽

10.1109/24.740487 ◽

1998 ◽

Vol 47 (3) ◽

pp. 212-224 ◽

Cited By ~ 1

Author(s):

G. Battaglini ◽

B. Ciciani

Keyword(s):

Fault Tolerant ◽

Programmable Logic ◽

Programmable Logic Arrays

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Implementation of fault-tolerant sequential circuits using programmable logic arrays

[1991] Proceedings. First Great Lakes Symposium on VLSI ◽

10.1109/glsv.1991.143954 ◽

2002 ◽

Author(s):

N. Misra ◽

A.K. Goel

Keyword(s):

Fault Tolerant ◽

Sequential Circuits ◽

Programmable Logic ◽

Programmable Logic Arrays

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Three approaches to design fault tolerant programmable logic arrays

Proceedings of the 28th annual Southeast regional conference on - ACM-SE 28 ◽

10.1145/98949.99035 ◽

1990 ◽

Author(s):

Sami A. Al-Arian ◽

Hari P. Kunamneni

Keyword(s):

Fault Tolerant ◽

Programmable Logic ◽

Programmable Logic Arrays

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Fault-Tolerant Design for Nanowire-Based Programmable Logic Arrays

Lecture Notes in Electrical Engineering - Robust Computing with Nano-scale Devices ◽

10.1007/978-90-481-8540-5_4 ◽

2010 ◽

pp. 51-68 ◽

Cited By ~ 2

Author(s):

Yexin Zheng ◽

Chao Huang

Keyword(s):

Fault Tolerant ◽

Programmable Logic ◽

Programmable Logic Arrays ◽

Fault Tolerant Design

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Fault Tolerant Approaches to Nanoelectronic Programmable Logic Arrays

37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07) ◽

10.1109/dsn.2007.49 ◽

2007 ◽

Cited By ~ 13

Author(s):

Wenjing Rao ◽

Alex Orailoglu ◽

Ramesh Karri

Keyword(s):

Fault Tolerant ◽

Programmable Logic ◽

Programmable Logic Arrays

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Specification for harmonized system of quality assessment for electronic components. Blank detail specification: programmable logic arrays (PLA)

10.3403/00220734u ◽

2015 ◽

Keyword(s):

Quality Assessment ◽

Programmable Logic ◽

Electronic Components ◽

Programmable Logic Arrays

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Foldable compatibility matrix for the folding of programmable logic arrays

International Journal of Electronics ◽

10.1080/00207218608920851 ◽

1986 ◽

Vol 61 (1) ◽

pp. 97-103

Author(s):

NRIPENDRA N. BISWAS

Keyword(s):

Programmable Logic ◽

Programmable Logic Arrays

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Fault-Tolerant Approach to the Conguration of Programmable Logic at the Nanoscale

Self-Healing at the Nanoscale ◽

10.1201/b11484-22 ◽

2011 ◽

pp. 420-471

Keyword(s):

Fault Tolerant ◽

Programmable Logic

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Laser tool for programming programmable logic arrays and repairing VLSI chips

10.1364/cleo.1982.thd3 ◽

1982 ◽

Author(s):

Joseph C. Logue ◽

Walter J. Kleinfelder ◽

J. Randal Moulic ◽

Paul Lowry ◽

Wei-Wha Wu

Keyword(s):

Programmable Logic ◽

Programmable Logic Arrays ◽

Vlsi Chips

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Structure and applications of field programmable logic arrays

Microelectronics Reliability ◽

10.1016/0026-2714(77)90081-6 ◽

1977 ◽

Vol 16 (1) ◽

pp. 21

Keyword(s):

Programmable Logic ◽

Programmable Logic Arrays ◽

Field Programmable ◽

Field Programmable Logic

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Matrix Model of Logical Simulator Within Spreadsheet

International Journal of Electrical Engineering Education ◽

10.1177/002072099303000304 ◽

1993 ◽

Vol 30 (3) ◽

pp. 216-223 ◽

Cited By ~ 3

Author(s):

Ilya Levin

Keyword(s):

Matrix Model ◽

Integrated Circuit ◽

Teaching And Learning ◽

Control Unit ◽

Function System ◽

Programmable Logic ◽

Programmable Logic Arrays ◽

Logical Function ◽

Control Units ◽

Logical Control

Matrix model of logical simulator within spreadsheet This paper examines the use of spreadsheets for simulation of logical control units. A matrix model is proposed for this aim. The use of this model is appropriate both for teaching and learning of simulation of a specific type of integrated circuit — Programmable Logic Arrays — and also for any type of control unit representable in the form of a logical function system.

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