Fabrication of ZnO Nanorods Based p–n Heterojunction Diodes and Their Electrical Behavior with Temperature

2017 ◽  
Vol 12 (7) ◽  
pp. 731-735 ◽  
Author(s):  
S. H. Kim ◽  
R. I. Badran ◽  
Ahmad Umar
Keyword(s):  
Zno Nanorods ◽  
Electrical Behavior ◽  
Heterojunction Diodes

The effect of grading on the electrical behavior of Np AlGaAs/GaAs heterojunction diodes

1986 ◽  
Vol 29 (2) ◽  
pp. 193-198 ◽  
Author(s):  
R. Fischer ◽  
T. Henderson ◽  
J. Klem ◽  
N. Chand ◽  
H. Morkoç
Keyword(s):  
Electrical Behavior ◽  
Heterojunction Diodes

scholarly journals Effect of Annealing Atmosphere on the Diode Behaviour of ZnO/Si Heterojunction

2021 ◽  
Author(s):  
Sadia Muniza Faraz ◽  
Syed Riaz un Nabi Jafri ◽  
Zarreen Tajvar ◽  
Naveed ul Hassan Alvi ◽  
Qamar-ul Wahab ◽  
...  
Keyword(s):  
Ideality Factor ◽  
Room Temperature ◽  
Series Resistance ◽  
Zno Nanorods ◽  
Annealing Atmosphere ◽  
Electrical Characteristics ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Growth Method ◽  
Heterojunction Diodes

The effect of thermal annealing atmosphere on the electrical characteristics of Zinc oxide (ZnO) nanorods/p-Silicon (Si) diodes is investigated. ZnO nanorods are grown by low-temperature aqueous solution growth method and annealed in Nitrogen and Oxygen atmosphere. As-grown and annealed nanorods are studied by scanning electron microscopy (SEM) and photoluminescence (PL) spectroscopy. Electrical characteristics of ZnO/Si heterojunction diodes are studied by current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. Improvements in rectifying behaviour, ideality factor, carrier concentration, and series resistance are observed after annealing. The ideality factor of 4.4 for as-grown improved to 3.8 and for Nitrogen and Oxygen annealed improved to 3.5 nanorods diodes. The series resistances decreased from 1.6 to 1.8 times after annealing. An overall improved behaviour is observed for oxygen annealed heterojunction diodes. The study suggests that by controlling the ZnO nanorods annealing temperatures and atmospheres the electronic and optoelectronic properties of ZnO devices can be improved.

Effect of Annealing Temperature on Morphology and Electrical Property of Hydrothermally-Grown ZnO Nanorods/p-Si Heterojunction Diodes

2019 ◽  
Vol 19 (3) ◽  
pp. 1640-1644 ◽  
Author(s):  
Jong Won Choi ◽  
Chang Min Lee ◽  
Chae Hee Park ◽  
Jun Hyung Lim ◽  
Geun Chul Park ◽  
...  
Keyword(s):  
Electrical Property ◽  
Annealing Temperature ◽  
Zno Nanorods ◽  
Heterojunction Diodes

scholarly journals Effect of annealing temperature on the interface state density of n-ZnO nanorod/p-Si heterojunction diodes

Open Physics ◽  
2021 ◽  
Vol 19 (1) ◽  
pp. 467-476
Author(s):  
Sadia Muniza Faraz ◽  
Syed Riaz un Nabi Jafri ◽  
Hashim Raza Khan ◽  
Wakeel Shah ◽  
Naveed ul Hassan Alvi ◽  
...  
Keyword(s):  
Zno Nanorods ◽  
Electrical Characterization ◽  
Nonlinear Behavior ◽  
Annealing Treatment ◽  
Interface State ◽  
Interface States ◽  
State Density ◽  
Interface State Density ◽  
Heterojunction Diodes ◽  
Density Of Interface States

Abstract The effect of post-growth annealing treatment of zinc oxide (ZnO) nanorods on the electrical properties of their heterojunction diodes (HJDs) is investigated. ZnO nanorods are synthesized by the low-temperature aqueous solution growth technique and annealed at temperatures of 400 and 600°C. The as-grown and annealed nanorods are studied by scanning electron microscopy (SEM) and photoluminescence (PL) spectroscopy. Electrical characterization of the ZnO/Si heterojunction diode is done by current–voltage (I–V) and capacitance–voltage (C–V) measurements at room temperature. The barrier height (ϕ B), ideality factor (n), doping concentration and density of interface states (N SS) are extracted. All HJDs exhibited a nonlinear behavior with rectification factors of 23, 1,596 and 309 at ±5 V for the as-grown, 400 and 600°C-annealed nanorod HJDs, respectively. Barrier heights of 0.81 and 0.63 V are obtained for HJDs of 400 and 600°C-annealed nanorods, respectively. The energy distribution of the interface state density has been investigated and found to be in the range 0.70 × 1010 to 1.05 × 1012 eV/cm2 below the conduction band from E C = 0.03 to E C = 0.58 eV. The highest density of interface states is observed in HJDs of 600°C-annealed nanorods. Overall improved behavior is observed for the heterojunctions diodes of 400°C-annealed ZnO nanorods.

scholarly journals l-Alanine capping of ZnO nanorods: increased carrier concentration in ZnO/CuI heterojunction diode

RSC Advances ◽  
2018 ◽  
Vol 8 (10) ◽  
pp. 5350-5361 ◽  
Author(s):  
E. Indubala ◽  
M. Dhanasekar ◽  
V. Sudha ◽  
E. J. Padma Malar ◽  
P. Divya ◽  
...  
Keyword(s):  
Amino Acid ◽  
Carrier Concentration ◽  
Zno Nanorods ◽  
Heterojunction Diode ◽  
Heterojunction Diodes ◽  
Simple Amino Acid

ZnO nanorods were capped with a simple amino acid, viz., l-Alanine to increase the carrier concentration and improve the performance of ZnO/CuI heterojunction diodes.

Faceted antiphase boundaries in GaAs grown on Ge

1987 ◽  
Vol 45 ◽  
pp. 314-315
Author(s):  
N.-H. Cho ◽  
S. McKernan ◽  
C.B. Carter ◽  
K. Wagner
Keyword(s):  
Cross Section ◽  
Atomic Resolution ◽  
Face Centered Cubic ◽  
Electrical Behavior ◽  
Sphalerite Structure ◽  
Antiphase Boundaries ◽  
Transmission Electron ◽  
Face Centered ◽  
Quality Material ◽  
Simulated Images

Interest has recently increased in the possibility of growing III-V compounds epitactically on non-polar substrates to produce device quality material. Antiphase boundaries (APBs) may then develop in the GaAs epilayer because it has sphalerite structure (face-centered cubic with a two-atom basis). This planar defect may then influence the electrical behavior of the GaAs epilayer. The orientation of APBs and their propagation into GaAs epilayers have been investigated experimentally using both flat-on and cross-section transmission electron microscope techniques. APBs parallel to (110) plane have been viewed at the atomic resolution and compared to simulated images.Antiphase boundaries were observed in GaAs epilayers grown on (001) Ge substrates. In the image shown in Fig.1, which was obtained from a flat-on sample, the (110) APB planes can be seen end-on; the faceted APB is visible because of the stacking fault-like fringes arising from a lattice translation at this interface.

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