Performance Evaluation of Graded Channel Dual Material Double Gate Engineered Nanowire Transistor (GC-DMDG NWT) with High-K Gate Dielectrics

Pankaj Appun Pegu; Uttam Chandra Boro

doi:10.1166/jnan.2016.1284

Performance Evaluation of Graded Channel Dual Material Double Gate Engineered Nanowire Transistor (GC-DMDG NWT) with High-K Gate Dielectrics

Journal of Nanoengineering and Nanomanufacturing ◽

10.1166/jnan.2016.1284 ◽

2016 ◽

Vol 6 (3) ◽

pp. 185-187

Author(s):

Pankaj Appun Pegu ◽

Uttam Chandra Boro

Keyword(s):

Performance Evaluation ◽

Gate Dielectrics ◽

Double Gate ◽

Nanowire Transistor ◽

High K ◽

Dual Material

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Performance Scrutiny of Source and Drain-Engineered Dual-Material Double-Gate (DMDG) SOI MOSFET with Various High-K

Advances in Intelligent Systems and Computing - Intelligent Engineering Informatics ◽

10.1007/978-981-10-7566-7_53 ◽

2018 ◽

pp. 533-539

Author(s):

Himanshu Yadav ◽

R. K. Chauhan

Keyword(s):

Double Gate ◽

Soi Mosfet ◽

High K ◽

Dual Material

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Surface potential based Analytical Modeling of Graded Channel Strained High-k Gate stack Dual-Material Double Gate MOSFET

2019 Devices for Integrated Circuit (DevIC) ◽

10.1109/devic.2019.8783284 ◽

2019 ◽

Cited By ~ 1

Author(s):

Pritha Banerjee ◽

Priyanka Saha ◽

Dinesh Kumar Dash ◽

Subir Kumar Sarkar

Keyword(s):

Surface Potential ◽

Analytical Modeling ◽

Double Gate ◽

Gate Stack ◽

High K ◽

Double Gate Mosfet ◽

Dual Material

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Performance analysis of long Ge channel double gate (DG) p MOSFETs with high-k gate dielectrics based on carrier concentration formulation

Microelectronics Reliability ◽

10.1016/j.microrel.2011.02.004 ◽

2011 ◽

Vol 51 (6) ◽

pp. 1105-1112 ◽

Cited By ~ 6

Author(s):

Swagata Bhattacherjee ◽

Abhijit Biswas

Keyword(s):

Performance Analysis ◽

Carrier Concentration ◽

Gate Dielectrics ◽

Double Gate ◽

High K

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A new analytical threshold voltage model for symmetrical double-gate MOSFETs with high-k gate dielectrics

Solid-State Electronics ◽

10.1016/j.sse.2007.01.026 ◽

2007 ◽

Vol 51 (3) ◽

pp. 387-393 ◽

Cited By ~ 21

Author(s):

T.K. Chiang ◽

M.L. Chen

Keyword(s):

Threshold Voltage ◽

Gate Dielectrics ◽

Double Gate ◽

High K ◽

Threshold Voltage Model

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Performance evaluation of novel low leakage Double-gate FinFET device at sub-22nm with LaAlO3 high-k gate oxide and TiN metal gate using quantum modeling

2014 International Conference on Electronics and Communication Systems (ICECS) ◽

10.1109/ecs.2014.6892692 ◽

2014 ◽

Cited By ~ 2

Author(s):

Subha Subramaniam ◽

Sangeeta M. Joshi ◽

R. N. Awale

Keyword(s):

Performance Evaluation ◽

Gate Oxide ◽

Double Gate ◽

Metal Gate ◽

Low Leakage ◽

High K ◽

Tin Metal ◽

Quantum Modeling

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Surface Potential Modeling of Graded-Channel Gate-Stack (GCGS) High-K Dielectric Dual-Material Double-Gate (DMDG) MOSFET and Analog/RF Performance Study

Silicon ◽

10.1007/s12633-018-9826-z ◽

2018 ◽

Vol 10 (6) ◽

pp. 2865-2875 ◽

Cited By ~ 16

Author(s):

Vadthiya Narendar ◽

Kalola Ankit Girdhardas

Keyword(s):

Surface Potential ◽

Double Gate ◽

Performance Study ◽

Gate Stack ◽

High K ◽

Channel Gate ◽

High K Dielectric ◽

Rf Performance ◽

Dual Material

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Drain Current Modelling of Asymmetric Junctionless Dual Material Double Gate MOSFET with High K Gate Stack for Analog and RF Performance

Silicon ◽

10.1007/s12633-020-00783-w ◽

2020 ◽

Author(s):

Arighna Basak ◽

Angsuman Sarkar

Keyword(s):

Drain Current ◽

Double Gate ◽

Gate Stack ◽

High K ◽

Double Gate Mosfet ◽

Rf Performance ◽

Dual Material ◽

Current Modelling

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Low-voltage high-mobility pentacene thin-film transistors with polymer/high-k oxide double gate dielectrics

Applied Physics Letters ◽

10.1063/1.2206555 ◽

2006 ◽

Vol 88 (24) ◽

pp. 243513 ◽

Cited By ~ 60

Author(s):

D. K. Hwang ◽

Kimoon Lee ◽

Jae Hoon Kim ◽

Seongil Im ◽

Chang Su Kim ◽

...

Keyword(s):

Thin Film ◽

Thin Film Transistors ◽

Low Voltage ◽

Gate Dielectrics ◽

High Mobility ◽

Double Gate ◽

High K

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A Holistic Approach on Junctionless Dual Material Double Gate (DMDG) MOSFET with High k Gate Stack for Low Power Digital Applications

Silicon ◽

10.1007/s12633-019-00128-2 ◽

2019 ◽

Vol 12 (2) ◽

pp. 393-403 ◽

Cited By ~ 7

Author(s):

S. Darwin ◽

T. S. Arun Samuel

Keyword(s):

Low Power ◽

Holistic Approach ◽

Double Gate ◽

Gate Stack ◽

High K ◽

Dual Material

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Performance evaluation of nanoscale halo dual-material double gate SiGe MOSFET using 2-D numerical simulation

Materials Today Proceedings ◽

10.1016/j.matpr.2019.10.073 ◽

2020 ◽

Vol 20 ◽

pp. 348-355

Author(s):

Toufik Bentrcia ◽

Fayçal Djeffal ◽

Mohamed Chahdi

Keyword(s):

Numerical Simulation ◽

Performance Evaluation ◽

Double Gate ◽

Dual Material

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