A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions
Keyword(s):
We present a versatile nanodamascene process for the realization of low-power nanoelectronic devices with different oxide junctions. With this process we have fabricated metal/insulator/metal junctions, metallic single electron transistors, silicon tunnel field effect transistors, and planar resistive memories. These devices do exploit one or two nanometric-scale tunnel oxide junctions based on TiO2, SiO2, HfO2, Al2O3, or a combination of those. Because the nanodamascene technology involves processing temperatures lower than 300°C, this technology is fully compatible with CMOS back-end-of-line and is used for monolithic 3D integration.
2019 ◽
Vol 5
(5)
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pp. 1800832
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Keyword(s):
1998 ◽
Vol 37
(Part 1, No. 6A)
◽
pp. 3257-3263
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2003 ◽
Vol 42
(Part 1, No. 10)
◽
pp. 6467-6472
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Keyword(s):