scholarly journals A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions

2017 ◽  
Vol 2017 ◽  
pp. 1-8 ◽  
Author(s):  
Dominique Drouin ◽  
Gabriel Droulers ◽  
Marina Labalette ◽  
Bruno Lee Sang ◽  
Patrick Harvey-Collard ◽  
...  

We present a versatile nanodamascene process for the realization of low-power nanoelectronic devices with different oxide junctions. With this process we have fabricated metal/insulator/metal junctions, metallic single electron transistors, silicon tunnel field effect transistors, and planar resistive memories. These devices do exploit one or two nanometric-scale tunnel oxide junctions based on TiO2, SiO2, HfO2, Al2O3, or a combination of those. Because the nanodamascene technology involves processing temperatures lower than 300°C, this technology is fully compatible with CMOS back-end-of-line and is used for monolithic 3D integration.

2017 ◽  
Vol 28 (21) ◽  
pp. 215203 ◽  
Author(s):  
Golnaz Karbasian ◽  
Michael S McConnell ◽  
Alexei O Orlov ◽  
Alexei N Nazarov ◽  
Gregory L Snider

2019 ◽  
Vol 5 (5) ◽  
pp. 1800832 ◽  
Author(s):  
Meiyong Liao ◽  
Liwen Sang ◽  
Takehiro Shimaoka ◽  
Masataka Imura ◽  
Satoshi Koizumi ◽  
...  

2017 ◽  
Vol 7 (3) ◽  
pp. 246 ◽  
Author(s):  
Golnaz Karbasian ◽  
Michael McConnell ◽  
Hubert George ◽  
Louisa Schneider ◽  
Matthew Filmer ◽  
...  

2003 ◽  
Vol 42 (Part 1, No. 10) ◽  
pp. 6467-6472 ◽  
Author(s):  
Günther Lientschnig ◽  
Irek Weymann ◽  
Peter Hadley

2010 ◽  
Vol 97 (25) ◽  
pp. 253502 ◽  
Author(s):  
Yuji Urabe ◽  
Masafumi Yokoyama ◽  
Hideki Takagi ◽  
Tetsuji Yasuda ◽  
Noriyuki Miyata ◽  
...  

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