scholarly journals Using Genetic Algorithms for Hardware Core Placement and Mapping in NoC-Based Reconfigurable Systems

2015 ◽  
Vol 2015 ◽  
pp. 1-13 ◽  
Author(s):  
Jonas Gomes Filho ◽  
Marius Strum ◽  
Wang Jiang Chau

Mapping of cores has been an important activity in NoC-based system design aimed to find the best topological location onto the NoC, such that the metrics of interest can be greatly optimized. In the last years, partial reconfigurable systems (PRSs) have included Networks-on-Chips (NoCs) as their communication structure, adding complexity to the problem of mapping. Several works have proposed specific and robust NoC architectures for PRSs, forming indirect and irregular networks, in which cases the mapping and placement problems must be treated altogether. The placement deals with the physical positioning of those cores inside the reconfigurable device. Up to now, to the best of our knowledge, the mapping-placement problem for those kinds of architectures has not been addressed yet. In this work, the problem formalization for the design-time hardware core placement and mapping in PRS-NoCs is proposed and methodologies for solving it with genetic algorithms (GAs) are presented. Several GA crossovers and methodologies are compared for obtaining the best solution. Results have shown that best GA solution obtained, in average, communication costs with 4% of penalty when compared with global minimum cost, obtained in a semiexhaustive approach. In addition, the algorithm presents low execution times.

2004 ◽  
Vol 12 (3) ◽  
pp. 327-353 ◽  
Author(s):  
Shawki Areibi ◽  
Zhen Yang

Combining global and local search is a strategy used by many successful hybrid optimization approaches. Memetic Algorithms (MAs) are Evolutionary Algorithms (EAs) that apply some sort of local search to further improve the fitness of individuals in the population. Memetic Algorithms have been shown to be very effective in solving many hard combinatorial optimization problems. This paper provides a forum for identifying and exploring the key issues that affect the design and application of Memetic Algorithms. The approach combines a hierarchical design technique, Genetic Algorithms, constructive techniques and advanced local search to solve VLSI circuit layout in the form of circuit partitioning and placement. Results obtained indicate that Memetic Algorithms based on local search, clustering and good initial solutions improve solution quality on average by 35% for the VLSI circuit partitioning problem and 54% for the VLSI standard cell placement problem.


Author(s):  
R. Sebastian Schrader ◽  
Michael L. Philpott ◽  
Gautam Subbarao ◽  
Dale E. Holmes

This paper presents a method for the optimization of machining parameters, essential for the determination of an economical operating point for multi-pass turning operations. Optimal selection of cutting parameters such as the number of passes, depth of cuts, cutting speeds and feed rates are critical to process planning and cost optimization. This in turn creates a crossing point between product design and manufacturing. Generally, machining models are complex since they are highly non-linear. This research utilizes genetic algorithms as an optimization technique in order to maximize the accuracy of results, the computational achievement, and to minimize the influence of initial conditions and part geometry. A new approach that uses conventional turning process modeling along with genetic algorithms to rapidly search and optimize the feasible workspace is considered. The total production cost minimization is achieved by adding together the minimum cost of each roughing pass and the final finishing pass. In addition, the preventive tool replacement policy used in practice is incorporated. Finally, the results obtained for test cases are evaluated and compared.


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