scholarly journals Design of a Single-Electron Memory Operating at Room Temperature

2013 ◽  
Vol 2013 ◽  
pp. 1-7 ◽  
Author(s):  
Amine Touati ◽  
Samir Chatbouri ◽  
Kalboussi Adel
Keyword(s):  
Monte Carlo ◽  
Coulomb Blockade ◽  
Room Temperature ◽  
Tunnel Junctions ◽  
Single Electron ◽  
Low Power Consumption ◽  
Two Dimensional ◽  
Regular Array ◽  
Single Electrons ◽  
Monte Carlo Simulator

Single-electronic transistors (SETs) are considered as the attractive component for the next generation of transistors due to their ultrasmall size and low power consumption. Because SETs with single island cannot work at high temperature normally, more researchers begin to carry out research on the SETs with N-dimension multi-islands. In this paper, we introduce a new architecture of single-electron memory; ideally the memory should operate in combination of SETs with a nanowire of two-dimensional regular array of multiple tunnel junctions (MTJs). This structure is analyzed and studied with Monte Carlo simulator, SIMON. The Coulomb blockade effect and thermionic effect play an important role in carrier conduction in the system at room temperature. Nanowire MTJs are used as an electrometer to sense the memory-node charge. The well-defined parameter in tunnel junction circuits helps to obtain the charging of single electrons in these circuits at room temperature.

ROOM TEMPERATURE TUNNELING CHARACTERISTICS OF ULTRA-SMALL NORMAL JUNCTIONS

1992 ◽  
Vol 06 (05) ◽  
pp. 273-280 ◽  
Author(s):  
M.D. REEVE ◽  
O.G. SYMKO ◽  
R. LI
Keyword(s):  
Scanning Tunneling Microscope ◽  
Coulomb Blockade ◽  
Room Temperature ◽  
Tunnel Junctions ◽  
Electron Tunneling ◽  
Single Electron ◽  
Scanning Tunneling ◽  
Tunneling Microscope ◽  
Single Electron Tunneling ◽  
Coulomb Staircase

Tunneling studies between a Scanning Tunneling Microscope (STM)-controlled fine NbN tip and a NbN thin film show single electron tunneling characteristics at room temperature. The I-V curves display the Coulomb blockade and the Coulomb staircase caused by single electron charging of a series combination of two tunnel junctions. These room temperature observations indicate that it may be possible to operate single-electron-based devices in non-cryogenic regimes.

Nano-Scale Silicon Quantum Dot-Based Single-Electron Transistors and Their Application to Design of Analog-to-Digital Convertors at Room Temperature

2017 ◽  
Vol 26 (12) ◽  
pp. 1750201
Author(s):  
Hamed Aminzadeh ◽  
Mohammad Ali Dashti ◽  
Mohammad Miralaei
Keyword(s):  
Quantum Dot ◽  
Coulomb Blockade ◽  
Room Temperature ◽  
Symmetric Functions ◽  
Single Electron ◽  
Stable Operation ◽  
Single Electron Transistors ◽  
Analog To Digital ◽  
Temperature Range ◽  
Electron Transistors

Room-temperature analog-to-digital converters (ADCs) based on nanoscale silicon (Si) quantum dot (QD)-based single-electron transistors (SETs) can be very attractive for high-speed processors embedded in future generation nanosystems. This paper focuses on the design and modeling of advanced single-electron converters suited for operation at room temperature. In contrast to conventional SETs with metallic QD, the use of sub-10-nm Si QD results in stable operation at room temperature, as the observable Coulomb blockade regime covers effectively the higher temperature range. Si QD-based SETs are also fully compatible with advanced CMOS technology and they can be manufactured using routine nanofabrication steps. At first, we present the principles of operation of Si SETs used for room-temperature operation. Possible flash-type ADC architectures are then investigated and the design considerations of possible Coulomb oscillation regimes are addressed. A modified design procedure is then introduced for [Formula: see text]-bit SET-based ADCs, and validated through simulation of a 3-bit ADC with a sampling frequency of 5 GS/s. The ADC core is comprised from a capacitive signal divider followed by three periodic symmetric functions (PSFs). Simulation results demonstrate the stability of output signals at the room-temperature range.

TRIPLE-TUNNEL JUNCTION SINGLE ELECTRON TRANSISTOR (TTJ-SET)

2011 ◽  
Vol 25 (17) ◽  
pp. 1487-1501
Author(s):  
ALI SHAHHOSEINI ◽  
KAMYAR SAGHAFI ◽  
MOHAMMAD KAZEM MORAVVEJ-FARSHI ◽  
RAHIM FAEZ
Keyword(s):  
Monte Carlo ◽  
Quantum Dot ◽  
Excellent Agreement ◽  
Tunnel Junction ◽  
Tunnel Junctions ◽  
Single Electron ◽  
Single Electron Transistor ◽  
Macro Model ◽  
Half Wave

We propose a triple-tunnel junction single electron transistor (TTJ-SET). The proposed structure consists of a metallic quantum-dot island that is capacitive coupled to a gate contact and surrounded by three tunnel junctions. To the best of our knowledge, this is the first instance of introducing this new structure that is suitable for both digital and analog applications. I–V D characteristics of the proposed TTJ-SET, simulated by a HSPICE macro model for various gate voltages, are in excellent agreement with those obtained by SIMON, which is a Monte-Carlo based simulator. We show how one can design a digital inverter by using a single TTJ-SET. We also show that, under suitable conditions, a TTJ-SET can operate as a full- or half-wave analog rectifier.

scholarly journals Coulomb blockade thermometry using a two-dimensional array of tunnel junctions

1999 ◽  
Vol 86 (7) ◽  
pp. 3844-3847 ◽  
Author(s):  
Tobias Bergsten ◽  
Tord Claeson ◽  
Per Delsing
Keyword(s):  
Coulomb Blockade ◽  
Tunnel Junctions ◽  
Two Dimensional ◽  
Dimensional Array

Room temperature Coulomb blockade effects in Au nanocluster/pentacene single electron transistors

2015 ◽  
Vol 26 (35) ◽  
pp. 355204 ◽  
Author(s):  
Haisheng Zheng ◽  
Mohamed Asbahi ◽  
Somik Mukherjee ◽  
Cherian J Mathai ◽  
Keshab Gangopadhyay ◽  
...  
Keyword(s):  
Coulomb Blockade ◽  
Room Temperature ◽  
Single Electron ◽  
Single Electron Transistors ◽  
Electron Transistors
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