scholarly journals Implementation of High Performance Microstepping Driver Using FPGA with the Aim of Realizing Accurate Control on a Linear Motion System

2013 ◽  
Vol 2013 ◽  
pp. 1-8
Author(s):  
Farid Alidoust Aghdam ◽  
Siamak Saeidi Haghi
Keyword(s):  
High Performance ◽  
Experimental Results ◽  
Hardware Description Language ◽  
Stepper Motor ◽  
Linear Motion ◽  
Description Language ◽  
Control Behavior ◽  
Motion System ◽  
Hardware Description ◽  
Hardware In Loop

This paper presents an FPGA-based microstepping driver which drives a linear motion system with a smooth and precise way. Proposed driver built on a Spartan3 FPGA (XC3S400 core) development board from Xilinx. Implementation of driver realized by an FPGA and using Verilog hardware description language in the Xilinx ISE environment. The driver’s control behavior can be adapted just by altering Verilog scripts. In addition, a linear motion system developed (with 4 mm movement per motor revolution) and coupled it to the stepper motor. The performance of the driver is tested by measuring the distance traveled on linear motion system. The experimental results verified using hardware-in-loop Matlab and Xilinx cosimulation method. This driver accomplishes a firm and accurate control and is responsive.

scholarly journals Designing High-Performance Fuzzy Controllers Combining IP Cores and Soft Processors

2012 ◽  
Vol 2012 ◽  
pp. 1-11 ◽  
Author(s):  
Oscar Montiel-Ross ◽  
Jorge Quiñones ◽  
Roberto Sepúlveda
Keyword(s):  
Parallel Programming ◽  
High Speed ◽  
High Performance ◽  
Hardware Description Language ◽  
System Response ◽  
Description Language ◽  
Tuning Method ◽  
Hardware Description ◽  
Ip Cores ◽  
Fuzzy Pd

This paper presents a methodology to integrate a fuzzy coprocessor described in VHDL (VHSIC Hardware Description Language) to a soft processor embedded into an FPGA, which increases the throughput of the whole system, since the controller uses parallelism at the circuitry level for high-speed-demanding applications, the rest of the application can be written in C/C++. We used the ARM 32-bit soft processor, which allows sequential and parallel programming. The FLC coprocessor incorporates a tuning method that allows to manipulate the system response. We show experimental results using a fuzzy PD+I controller as the embedded coprocessor.

Design of High-Performance Vehicle Multi-Axis Optical Encoder Data Acquisition System Based on PC104 Bus

2013 ◽  
Vol 333-335 ◽  
pp. 428-431
Author(s):  
Hua Pei Wang ◽  
Dong Ji ◽  
Dong Chen
Keyword(s):  
Data Acquisition ◽  
High Performance ◽  
Data Acquisition System ◽  
Hardware Description Language ◽  
Acquisition System ◽  
Main Function ◽  
Description Language ◽  
Optical Encoder ◽  
System Module ◽  
Hardware Description

A high-performance vehicle multi-axis optical encoder data acquisition system based on PC104 bus is introduced. The paper puts emphases on the main function of the system module. VHDL hardware description language is used to design the modules, and ModelSim is introduced to implement logic and sequential simulation. An experiment is carried on in Altera EPF10K40 chip. Both the simulation and experimental results verify the correctness and validity of the method.

Design of AD Controller Customized IP Core Based on FPGA

2015 ◽  
Vol 727-728 ◽  
pp. 859-862
Author(s):  
Xiang Sheng Huang
Keyword(s):  
Experimental Results ◽  
Hardware Description Language ◽  
Ip Core ◽  
Verilog Hdl ◽  
Description Language ◽  
C Language ◽  
The Core ◽  
Hardware Description ◽  
Program Interface ◽  
And Control

This design elaborates thedevelopment process of the custom IP core AD9280 controller based on FPGA. Thedesign uses FPGA as the core of the microcontroller, realizes the function ofAD controller by adopting the hardware description language,Verilog HDL and encapsulates it to the custom IP core in the SOPCBuilder. In the NIOS II, the application program interface (API) function ofthe AD controller software is used to access and control the hardware, thesoftware is written by using C language. The experimental results show thatthis custom IP core is feasible and flexible, fully reflects the advantages ofSOPC technology.

Design of Digital Cymometer Based on EDA Technology

2015 ◽  
Vol 719-720 ◽  
pp. 517-521
Author(s):  
Hao Sun ◽  
Xin Wen Duan ◽  
Yuan Liu
Keyword(s):  
High Reliability ◽  
Experimental Results ◽  
Hardware Description Language ◽  
Measuring Error ◽  
Description Language ◽  
Measuring Range ◽  
Large Delay ◽  
Hardware Description ◽  
Very High

To overcome the shortcoming that the traditional cymometer has a relatively large delay, small measuring range, low precision, poor reliability and complicated circuit; A design of digital cymometer based on EDA technology is proposed. The design is programmed with the hardware description language of VHDL. And it takes full advantages of Max+PlusII software to compile and simulate. All the functions are downloaded into and debugged on the chip of EP1K100QC in ACEX1K series from Altera Company. The experimental results show that this system has a very high reliability and small measuring error. The function of this system completely satisfies the demand of the design.

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