scholarly journals Improving the RF Performance of Carbon Nanotube Field Effect Transistor

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
S. Hamieh

Compact model of single-walled semiconducting carbon nanotube field-effect transistors (CNTFETs) implementing the calculation of energy conduction subband minima under VHDLAMS simulator is used to explore the high-frequency performance potential of CNTFET. The cutoff frequency expected for a MOSFET-like CNTFET is well below the performance limit, due to the large parasitic capacitance between electrodes. We show that using an array of parallel nanotubes as the transistor channel combined in a finger geometry to produce a single transistor significantly reduces the parasitic capacitance per tube and, thereby, improves high-frequency performance.

2012 ◽  
Vol 101 (5) ◽  
pp. 053123 ◽  
Author(s):  
Mathias Steiner ◽  
Michael Engel ◽  
Yu-Ming Lin ◽  
Yanqing Wu ◽  
Keith Jenkins ◽  
...  

Nanomaterials ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 3121
Author(s):  
Monica La Mura ◽  
Patrizia Lamberti ◽  
Vincenzo Tucci

The interest in graphene-based electronics is due to graphene’s great carrier mobility, atomic thickness, resistance to radiation, and tolerance to extreme temperatures. These characteristics enable the development of extremely miniaturized high-performing electronic devices for next-generation radiofrequency (RF) communication systems. The main building block of graphene-based electronics is the graphene-field effect transistor (GFET). An important issue hindering the diffusion of GFET-based circuits on a commercial level is the repeatability of the fabrication process, which affects the uncertainty of both the device geometry and the graphene quality. Concerning the GFET geometrical parameters, it is well known that the channel length is the main factor that determines the high-frequency limitations of a field-effect transistor, and is therefore the parameter that should be better controlled during the fabrication. Nevertheless, other parameters are affected by a fabrication-related tolerance; to understand to which extent an increase of the accuracy of the GFET layout patterning process steps can improve the performance uniformity, their impact on the GFET performance variability should be considered and compared to that of the channel length. In this work, we assess the impact of the fabrication-related tolerances of GFET-base amplifier geometrical parameters on the RF performance, in terms of the amplifier transit frequency and maximum oscillation frequency, by using a design-of-experiments approach.


2020 ◽  
Vol 2 (9) ◽  
pp. 4179-4186 ◽  
Author(s):  
Pedro C. Feijoo ◽  
Francisco Pasadas ◽  
Marlene Bonmann ◽  
Muhammad Asad ◽  
Xinxin Yang ◽  
...  

A drift–diffusion model including self-heating effects in graphene transistors to investigate carrier velocity saturation for optimal high frequency performance.


NANO ◽  
2015 ◽  
Vol 10 (02) ◽  
pp. 1550027 ◽  
Author(s):  
Avik Chakraborty ◽  
Angsuman Sarkar

This paper presents the analog/RF performance for an III–V semiconductor-based staggered hetero-tunnel-junction n-type nanowire (NW) tunneling field effect transistor (n-TFET), for the first time. The device parameters for analog/mixed-signaling applications, such as transconductance (gm), transconductance-to-drive current ratio (gm/I DS ), output resistance (R out ), intrinsic gain and unity-gain cutoff frequency (fT) are studied for III–V based NW n-TFET, with the help of device simulator and compared with those for a similarly sized homojunction (HJ) NW n-TFET. The result reveals that the hetero-tunnel-junction n-TFETs outperform their HJ counterparts for analog/mixed-signal system-on-chip (SoC) applications.


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