scholarly journals A K-Band RF-MEMS-Enabled Reconfigurable and Multifunctional Low-Noise Amplifier Hybrid Circuit

2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
R. Malmqvist ◽  
C. Samuelsson ◽  
A. Gustafsson ◽  
P. Rantakari ◽  
S. Reyaz ◽  
...  

A K-band (18–26.5 GHz) RF-MEMS-enabled reconfigurable and multifunctional dual-path LNA hybrid circuit (optimised for lowest/highest possible noise figure/linearity, resp.) is presented, together with its subcircuit parts. The two MEMS-switched low-NF (higher gain) and high-linearity (lower gain) LNA circuits (paths) present 16.0 dB/8.2 dB, 2.8 dB/4.9 dB and 15 dBm/20 dBm of small-signal gain, noise figure, and 1 dB compression point at 24 GHz, respectively. Compared with the two (fixed) LNA subcircuits used within this design, the MEMS-switched LNA circuit functions show minimum 0.6–1.3 dB higher NF together with similar values ofP1 dBat 18–25 GHz. The gain of one LNA circuit path is reduced by 25–30 dB when the MEMS switch and active circuitry used within in the same switching branch are switched off to select the other LNA path and minimise power consumption.

2016 ◽  
Vol 54 (5) ◽  
pp. 584
Author(s):  
Phong Dai Le ◽  
Vu Duy Thong ◽  
Pham Le Binh

In this paper, a three stages monolithic low noise amplifier (LNA) for T/R module application is presented. This LNA is fully integrated on 0.15-um pHEMT GaAs technology and achieves a wide bandwidth from 6 GHz to 11 GHz. Within this band, the LNA has the minimum of 1.3 dB noise figure and over 25 dB small signal gain. The output third order interception point (OIP3) is over 30 dBm and the 1 dB compression point (P1 dB) is 16 dBm at the output.


Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 150 ◽  
Author(s):  
Lorenzo Pace ◽  
Sergio Colangeli ◽  
Walter Ciccognani ◽  
Patrick Ettore Longhi ◽  
Ernesto Limiti ◽  
...  

In this paper a GaN-on-Si MMIC Low-Noise Amplifier (LNA) working in the Ka-band is shown. The chosen technology for the design is a 100 nm gate length HEMT provided by OMMIC foundry. Both small-signal and noise models had been previously extracted by the means of an extensive measurement campaign, and were then employed in the design of the presented LNA. The amplifier presents an average noise figure of 2.4 dB, a 30 dB average gain value, and input/output matching higher than 10 dB in the whole 34–37.5 Ghz design band, while non-linear measurements testify a minimum output 1 dB compression point of 23 dBm in the specific 35–36.5 GHz target band. This shows the suitability of the chosen technology for low-noise applications.


Author(s):  
Soenke Vehring ◽  
Yaoshun Ding ◽  
Philipp Scholz ◽  
Dominic Maurath ◽  
Silvio Ernesto Barbin ◽  
...  

2012 ◽  
Vol 433-440 ◽  
pp. 5579-5583
Author(s):  
Ji Hai Duan ◽  
Chun Lei Kang

A fully integrated 5.2GHz variable gain low noise amplifier (VGLNA) in a 0.18μm CMOS process is proposed in this paper. The VGLAN can achieve a maximum small signal gain of 17.85 dB within the noise figure (NF) of 2.04 dB and a minimum gain of 2.04 dB with good input return loss. The LNA’s P1dB in the high gain mode is -17.5 dBm. The LAN consumes only 14.58 mW from a 1.8V power supply.


1999 ◽  
Vol 603 ◽  
Author(s):  
Guru Subramanyam ◽  
Felix A. Miranda ◽  
Robert R. Romanofsky ◽  
Fred Van Keuls ◽  
Chonglin Chen

AbstractIn this paper we discuss the performance of a proof-of-concept of a tunable band pass filter (BPF)/Low Noise Amplifier (LNA) hybrid circuit for a possible gain-compensated down-converter targeted for the next generation of K-band satellite communication systems. Electrical tunability of the filter is obtained through the nonlinear electric field dependence of the relative dielectric constant of a ferroelectric thin-film such as strontium titanate (SrTiO3) or barium strontium titanate (BaxSr1−xTiO3). Experimental results show that the BPFs are tunable by more than 5%, with a bipolar biasing scheme employed. The BPF/LNA tunable hybrid circuit was used to study the effect of tuning on the hybrid circuit's performance especially on the amplifier's noise-figure and the gain.


This discourse used 45nm CMOS technology to design a Low noise amplifier for a Noise figure < 2dB and gain greater than 13dB at the 60GHz unlicensed band of frequency. A single stage, primary cascode LNA is modeled and its small signal model is analyzed. Common source structure is hired in the driver stage to escalate the output power with single stage contours. To enhance small signal gain, simple active transistor feedback and cascode feedback configurations are designed and appended to the basic LNA. In addition to this, current re-use inductor is designed and added to the cascode amplifier which is deliberated to give low power and low noise figure. Small signal analysis of simple active transistor feedback and current re-use inductor has been presented. The measurement results indicated that the input match and the output gain at 60GHz achieves -8dB and 13dB respectively with the supply voltage of 900mV. The frequency response obtained is a narrow band response with 6GHz of bandwidth. The circuit is simulated by Cadence Virtuoso tool. The layout of the related circuit is drawn by means of the Virtuoso Layout editor with total size of 0.1699μm2.


2015 ◽  
Vol 7 (3-4) ◽  
pp. 339-347 ◽  
Author(s):  
Stefan Malz ◽  
Bernd Heinemann ◽  
Rudolf Lachner ◽  
Ullrich R. Pfeiffer

This paper presents two J-band amplifiers in different 0.13 μm SiGe technologies: a small signal amplifier (SSA) in a technology in which never before gain has been shown over 200 GHz; and a low noise amplifier (LNA) design for 230 GHz applications in an advanced SiGe HBT technology with higher fT/fmax, demonstrating the combination of high gain, low noise, and low power in a single amplifier. Both circuits consist of a four-stage pseudo-differential cascode topology. By employing series–series feedback at the single-stage level the small-signal gain is increased, enabling circuit operation at high-frequencies and with improved efficiency, while maintaining unconditional stability. The SSA was fabricated in a SiGe BiCMOS technology by Infineon with fT/fmax values of 250/360 GHz. It has measured 19.5 dB gain at 212 GHz with a 3 dB bandwidth of 21 GHz. It draws 65 mA from a 3.3 V supply. On the other hand, a LNA was designed in a SiGe BiCMOS technology by IHP with fT/fmaxof 300/450 GHz. The LNA has measured 22.5 dB gain at 233 GHz with a 3 dB bandwidth of 10 GHz and a simulated noise figure of 12.5 dB. The LNA draws only 17 mA from a 4 V supply. The design methodology, which led to these record results, is described in detail with the LNA as an example.


Author(s):  
Philipp Scholz ◽  
Soenke Vehring ◽  
Uwe Kerst ◽  
Dirk Berger ◽  
Christian Boit ◽  
...  

Abstract As the Internet of Things, smart factories and autonomous driving increase the demand for low-price radar sensors, the authors address this need by developing a 24 GHz short range radar in standard bulk silicon CMOS technology for mass market production. CMOS technology enables cost reduction and efficient system integration compared to former GaAs and current SiGe solutions. Design for failure analysis (DFFA) is implemented in the low-noise amplifier (LNA) of the radar to identify and compensate process deviations. It consists of scalable capacitor structures and is executed using focused ion beam circuit edit. By doing so, the design specifications of high gain and low noise of the LNA are reliably met at high yield for the desired operating frequency. The presented DFFA method enables a shift in peak gain by 2.5 GHz. It thereby improves gain and noise figure at 24 GHz by 2 dB and -0.2 dB respectively. The resulting optimized LNA achieves a gain of 20 dB and a noise figure of 3.7 dB matching and surpassing other state-of-the-art works in a single prototyping run.


2007 ◽  
Vol 17 (7) ◽  
pp. 546-548 ◽  
Author(s):  
T. Gaier ◽  
L. Samoska ◽  
A. Fung ◽  
W. R. Deal ◽  
V. Radisic ◽  
...  

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