scholarly journals Simulation of Drastic Lag Phenomena in GaAs-Based FETs for Large Voltage Swing

VLSI Design ◽  
2001 ◽  
Vol 13 (1-4) ◽  
pp. 245-249
Author(s):  
K. Horio ◽  
Y. Mitani ◽  
A. Wakabayashi ◽  
N. Kurosawa
Keyword(s):  
Surface State ◽  
Gate Voltage ◽  
Current Transient ◽  
Drain Voltage ◽  
Turn On ◽  
Voltage Swing

Turn-on characteristics of GaAs MESFETs and HEMTs are simulated when the gate voltage is changed abruptly. The gate-lag or slow current transient becomes more pronounced when the off-state gate voltage is more negative, because the surface-state effects or substrate-trap effects become more significant. Changes of I–V curves of GaAs MESFETs, when the drain voltage is swept with different speeds, are also simulated. When the swept time is short, the curve shows overshoot-like behavior and the kink disappears, indicating that the I–V characteristics should be quite different between DC and RF conditions.

scholarly journals Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET

2021 ◽  
Vol 11 (5) ◽  
pp. 2210
Author(s):  
Bartosz Lasek ◽  
Przemysław Trochimiuk ◽  
Rafał Kopacz ◽  
Jacek Rąbkowski
Keyword(s):  
Gate Voltage ◽  
Drain Current ◽  
Theoretical Background ◽  
Dissipated Energy ◽  
Feedback Signal ◽  
Power Losses ◽  
Turn On ◽  
Speed Up ◽  
Gate Driver ◽  
The Right

This article discusses an active gate driver for a 1.7 kV/325 A SiC MOSFET module. The main purpose of the driver is to adjust the gate voltage in specified moments to speed up the turn-on cycle and reduce the amount of dissipated energy. Moreover, an adequate manipulation of the gate voltage is necessary as the gate current should be reduced during the rise of the drain current to avoid overshoots and oscillations. The gate voltage is switched at the right moments on the basis of the feedback signal provided from a measurement of the voltage across the parasitic source inductance of the module. This approach simplifies the circuit and provides no additional power losses in the measuring circuit. The paper contains the theoretical background and detailed description of the active gate driver design. The model of the parasitic-based active gate driver was verified using the double-pulse procedure both in Saber simulations and laboratory experiments. The active gate driver decreases the turn-on energy of a 1.7 kV/325 A SiC MOSFET by 7% comparing to a conventional gate driver (VDS = 900 V, ID = 270 A, RG = 20 Ω). Furthermore, the proposed active gate driver lowered the turn-on cycle time from 478 to 390 ns without any serious oscillations in the main circuit.

scholarly journals High-Efficiency DC–DC Converter with Charge-Recycling Gate-Voltage Swing Control

Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 899 ◽  
Author(s):  
Jung-Duk Suh ◽  
Yeong-Ho Yun ◽  
Bai-Sun Kong
Keyword(s):  
Gate Voltage ◽  
Power Efficiency ◽  
High Efficiency ◽  
Cmos Technology ◽  
Test Chip ◽  
Efficient Manner ◽  
Light Load ◽  
Charge Recycling ◽  
Voltage Swing ◽  
Full Swing

This paper proposes a high-efficiency DC–DC converter with charge-recycling gate-voltage swing control with a light load. By achieving a variable gate-voltage swing in a very efficient manner by charge recycling, the power efficiency has been substantially improved due to the lower power consumption and the achieved balance between the switching and conduction losses. A test chip was fabricated using 65-nm CMOS technology. The proposed design reduces the gate-driving loss by up to 87.7% and 47.2% compared to the conventional full-swing and low-swing designs, respectively. The maximum power conversion efficiency was 90.3% when the input and output voltages are 3.3 V and 1.8 V, respectively.

scholarly journals Comparison of bulk FinFET and SOI FinFET

2018 ◽  
Vol 201 ◽  
pp. 02009
Author(s):  
Ying-Yu Chen ◽  
Yu-Hsien Lin
Keyword(s):  
Gate Voltage ◽  
Gate Length ◽  
Drain Voltage

In this study, we compare the differences and advantages between Bulk FinFET and SOI FinFET. The results are simulated by using the ISE TCAD software. By changing the parameters of the gate voltage, drain voltage and gate length to analysis which characteristic is better. Through the experiment results, we demonstrate that the SOI FinFET have the better characteristics than bulk FinFET[1].

Active gate voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors

2006 ◽  
Vol 21 (4) ◽  
pp. 849-855 ◽  
Author(s):  
Nadir Idir ◽  
Robert Bausiere ◽  
Jean Jacques Franchaud
Keyword(s):  
Gate Voltage ◽  
Voltage Control ◽  
Turn On
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