scholarly journals Electron Transport Using the Quantum Corrected Hydrodynamic Equations

VLSI Design ◽  
1995 ◽  
Vol 3 (2) ◽  
pp. 179-200 ◽  
Author(s):  
J. P. Kreskovsky ◽  
H. L. Grubin
Keyword(s):  
Electron Transport ◽  
Quantum Well ◽  
Semiconductor Device ◽  
Computational Procedure ◽  
Two Dimensional ◽  
Hydrodynamic Equations ◽  
One Dimensional ◽  
Device Structures ◽  
Hemt Structure ◽  
Sharp Interfaces

Transport in one- and two-dimensional semiconductor device structures is considered using a set of quantum corrected hydrodynamic equations. Simple one-dimensional simulations demonstrate the need to include quantum effects in structures with sharp interfaces. Application to a two-dimensional quantum well HEMT structure is then considered. A brief discussion of the computational procedure is also presented.

Molecular Beam Epitaxy of Semiconductor Nanostructures Based on SiC

2005 ◽  
Vol 483-485 ◽  
pp. 163-168 ◽  
Author(s):  
Andreas Fissel
Keyword(s):  
Molecular Beam Epitaxy ◽  
Quantum Dot ◽  
Quantum Well ◽  
Quantum Wire ◽  
Molecular Beam ◽  
Semiconductor Nanostructures ◽  
Two Dimensional ◽  
Nanorod Arrays ◽  
Mbe Growth ◽  
One Dimensional

The different aspects of molecular beam epitaxy (MBE) for producing two-dimensional (Quantum well), one-dimensional (Quantum wire and rod), and zero-dimensional (Quantum dot) structures based on SiC for functional applications are discussed. Development and implementation of a suitable MBE growth procedure for fabrication of heteropolytypic layer sequences are demonstrated in context with thermodynamic considerations. Furthermore, the growth of onedimensional structures based on cubic wires and nanorod arrays, also grown on Si(111), is shown. Moreover, the perspectives of quantum dot structures and a novel way to form 3C-SiC-dot structures within α-SiC has been discussed.

Terahertz electron transport in a two-dimensional topological insulator in a HgTe quantum well

JETP Letters ◽  
2014 ◽  
Vol 99 (5) ◽  
pp. 290-294 ◽  
Author(s):  
Z. D. Kvon ◽  
K. M. Dantscher ◽  
C. Zoth ◽  
D. A. Kozlov ◽  
N. N. Mikhailov ◽  
...  
Keyword(s):  
Electron Transport ◽  
Quantum Well ◽  
Topological Insulator ◽  
Two Dimensional

A one-dimensional self-gravitating stellar gas

1966 ◽  
Vol 25 ◽  
pp. 46-48 ◽  
Author(s):  
M. Lecar
Keyword(s):  
Gravitational Field ◽  
Phase Space ◽  
Motion Picture ◽  
Space Distribution ◽  
Two Dimensional ◽  
One Dimensional ◽  
Phase Space Distribution ◽  
Dimensional Phase Space ◽  
The Mean

“Dynamical mixing”, i.e. relaxation of a stellar phase space distribution through interaction with the mean gravitational field, is numerically investigated for a one-dimensional self-gravitating stellar gas. Qualitative results are presented in the form of a motion picture of the flow of phase points (representing homogeneous slabs of stars) in two-dimensional phase space.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

Sign in / Sign up

Export Citation Format

Share Document