High Performance MOCVD-Grown ZnO Thin-Film Transistor with a Thin MgZnO Layer at Channel/Gate Insulator Interface

2010 ◽  
Vol 157 (12) ◽  
pp. H1121 ◽  
Author(s):  
K. Remashan ◽  
Y. S. Choi ◽  
S. J. Park ◽  
J. H. Jang
Keyword(s):  
Thin Film ◽  
High Performance ◽  
Thin Film Transistor ◽  
Gate Insulator ◽  
Zno Thin Film ◽  
Insulator Interface ◽  
Channel Gate

High performance ferroelectric ZnO thin film transistor using AlOx/HfZrO/ZrOx gate insulator by spray pyrolysis

2021 ◽  
Vol 119 (9) ◽  
pp. 093502
Author(s):  
Md Mehedi Hasan ◽  
Mohit ◽  
Jinbaek Bae ◽  
Eisuke Tokumitsu ◽  
Hye-Yong Chu ◽  
...  
Keyword(s):  
Thin Film ◽  
Spray Pyrolysis ◽  
High Performance ◽  
Thin Film Transistor ◽  
Gate Insulator ◽  
Zno Thin Film

High-performance ZnO thin-film transistor fabricated by atomic layer deposition

2011 ◽  
Vol 26 (8) ◽  
pp. 085007 ◽  
Author(s):  
Byeong-Yun Oh ◽  
Young-Hwan Kim ◽  
Hee-Jun Lee ◽  
Byoung-Yong Kim ◽  
Hong-Gyu Park ◽  
...  
Keyword(s):  
Thin Film ◽  
Atomic Layer Deposition ◽  
High Performance ◽  
Thin Film Transistor ◽  
Atomic Layer ◽  
Zno Thin Film ◽  
Layer Deposition

High performance dual-layer channel ZnO thin film transistor

2012 ◽  
Author(s):  
Y. F. Geng ◽  
D. D. Han ◽  
J. Cai ◽  
W. Wang ◽  
L.L. Wang ◽  
...  
Keyword(s):  
Thin Film ◽  
High Performance ◽  
Thin Film Transistor ◽  
Zno Thin Film

P-26: Self-aligned Top-gate ZnO Thin Film Transistor with Novel Al2O3/SiO2 Gate Insulator Structure

2010 ◽  
Vol 41 (1) ◽  
pp. 1319 ◽  
Author(s):  
Rongsheng Chen ◽  
Shuyun Zhao ◽  
Wei Zhou ◽  
Hoi Sing Kwok
Keyword(s):  
Thin Film ◽  
Thin Film Transistor ◽  
Gate Insulator ◽  
Zno Thin Film

Effects of N2 Plasma Treatment on SiO2 Gate Insulator in a-Si:H Thin Film Transistor

1994 ◽  
Vol 345 ◽  
Author(s):  
Sung Chul Kim ◽  
Sung Sig Bae ◽  
Eui Yeol Oh ◽  
Jeong Hyun Kim ◽  
Jong Wan Lee ◽  
...  
Keyword(s):  
Thin Film ◽  
Plasma Treatment ◽  
High Performance ◽  
Thin Film Transistor ◽  
Interface Layer ◽  
Experimental Results ◽  
Gate Insulator ◽  
Interface Region ◽  
Sequential Deposition ◽  
N2 Plasma

AbstractWe fabricated the high performance a-Si:H TFT using the N2 plasma treated APCVD SiO2 as a gate insulator. The effects of N2 plasma treatment on the APCVD SiO2 were investigated by XPS and SIMS measurements. And the formation of the oxynitride interface layer between a-Si:H and APCVD SiO2 was found in the a-Si:H TFT. From our experimental results, It may be concluded that most nitrogen atoms, which were incorporated by the exposure of SiO2 layer to N2 plasma, exist, not bonded to other atoms, near the surface of the SiO2 layer and during the sequential deposition of a-Si:H on the N2 plasma treated APCVD SiO2 layer Si-N bonds are formed, resulting in the oxynitride layer in the interface region. This explains the high performance a-Si:H TFT with the N2 plasma treated APCVD SiO2 gate insulator.

scholarly journals Nonvolatile memory devices based on undoped and Hf- and NaF-doped ZnO thin film transistors with Ag nanowires inserted between ZnO and gate insulator interface

RSC Advances ◽  
2017 ◽  
Vol 7 (44) ◽  
pp. 27699-27706 ◽  
Author(s):  
Manoj Kumar ◽  
Hakyung Jeong ◽  
Dongjin Lee
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Nonvolatile Memory ◽  
Charge Trapping ◽  
Gate Insulator ◽  
Memory Devices ◽  
Zno Thin Film ◽  
Insulator Interface ◽  
Ag Nanowires ◽  
Nonvolatile Memory Devices

Nonvolatile memory devices based on solution-processed thin film transistors (TFTs) of undoped ZnO and ZnO doped with Hf and NaF incorporating Ag nanowires (AgNWs) as charge trapping media between the ZnO and insulator interface are demonstrated.

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