Electrical Extraction of One Dimensional MOSFET Doping Profiles by Threshold Voltage Measurement

2019 ◽  
Vol 28 (1) ◽  
pp. 277-279
Author(s):  
Hyunho Park ◽  
Kong-Soo Lee ◽  
Hanwook Jeong ◽  
Seok Il Kwon ◽  
Kwang-Ryul Kim ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Voltage Measurement ◽  
One Dimensional ◽  
Doping Profiles

The Application of Solid Source Diffusion in the Vertical Replacement-Gate (VRG) MOSFET

2000 ◽  
Vol 610 ◽  
Author(s):  
Sang-Hyun Oh ◽  
J.M. Hergenrother ◽  
Don Monroe ◽  
T. Nigam ◽  
F.P. Klemens ◽  
...  
Keyword(s):  
Channel Length ◽  
Gate Length ◽  
Critical Dimensions ◽  
One Dimensional ◽  
Novel Device ◽  
Polysilicon Gate ◽  
Phosphosilicate Glass ◽  
Doping Profiles ◽  
Deposited Film

AbstractWe discuss the first use of solid source diffusion (SSD) to form shallow, self-aligned SDEs in a novel device known as the Vertical Replacement-Gate (VRG) MOSFET. This is the only MOSFET ever built that combines 1) a gate length controlled precisely through a deposited film thickness, independently of lithography and etch, and 2) a high-quality gate oxide grown on a single-crystal Si channel. The use of SSD in this novel geometry allows us to transform the precise gate length control afforded by the VRG process into precise, lithography-independent channel length control. In the VRG-nMOS process, silicon nitride offset spacers separate the phosphosilicate glass (PSG) SSD dopant sources from the polysilicon gate. These offset spacers, whose critical dimensions are also controlled by film thicknesses, allow us to precisely tune the gate-source and gate-drain overlaps in order to optimize the capacitance/series resistance tradeoff. These parasitic overlap capacitances have precluded the high-frequency operation of many previous vertical MOSFETs. In this paper, we discuss the SIMS and sheet resistance characterization of shallow phosphorus junctions formed in one-dimensional SSD experiments. We will also discuss the scanning capacitance characterization of two-dimensional doping profiles of VRG-nMOSFETs with gate lengths down to 50 nm.

Simulation of Capacitance-Voltage characteristics of Ultra-thin Metal-Oxide-Semiconductor Structures with Embedded Nanocrystals

2008 ◽  
Vol 1071 ◽  
Author(s):  
Mosur Rahman ◽  
Bo Lojek ◽  
Thottam Kalkur
Keyword(s):  
Metal Oxide ◽  
Threshold Voltage ◽  
Mechanical Model ◽  
Inversion Layer ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Quantum Mechanical ◽  
Layer Width ◽  
Doping Profiles ◽  
Mos Structures

AbstractThis paper presents an approach to model quantum mechanical effects in solid-state devices such as Metal Oxide Semiconductor (MOS) capacitor with and without nanocrystal in the oxide at the device simulation level. This quantum-mechanical model is developed to understand finite inversion layer width and threshold voltage shift. It allows a consistent determination of the physical oxide thickness based on an agreement between the measured and modeled C-V curves. However, as for thinner oxides finite inversion layer width effects become more severe, quantum-mechanical model predicts higher threshold voltage than the classical model. The inversion-layer charge density and MOS capacitance in multidimensional MOS structures are simulated with various substrate doping profiles and gate bias voltages. The effectiveness of the QM correct method for modeling quantum effects in ultrathin oxide MOS structures is also investigated. The CV characteristic is used as a tool to compare results of the QM correction with that of the Schrödinger–Poisson (SP) solution and Classical solution The variation of (different parameters) for various doping profiles at different gate voltages is investigated.

Radiation-induced statistical uncertainty in the threshold voltage measurement of MOSFET dosimeters

2004 ◽  
Vol 49 (14) ◽  
pp. 3145-3159 ◽  
Author(s):  
Chris Benson ◽  
Robert A Price ◽  
Jon Silvie ◽  
Aleksandar Jaksic ◽  
Malcolm J Joyce
Keyword(s):  
Threshold Voltage ◽  
Statistical Uncertainty ◽  
Voltage Measurement ◽  
Radiation Induced
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