Switching Power Reduction in Phase Change Memory Cell Using CVD Ge[sub 2]Sb[sub 2]Te[sub 5] and Ultrathin TiO[sub 2] Films

2009 ◽  
Vol 156 (1) ◽  
pp. H59 ◽  
Author(s):  
Byung Joon Choi ◽  
Seung Hwan Oh ◽  
Seol Choi ◽  
Taeyong Eom ◽  
Yong Cheol Shin ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Power Reduction ◽  
Switching Power ◽  
Change Memory

Self-Assembled Incorporation of Modulated Block Copolymer Nanostructures in Phase-Change Memory for Switching Power Reduction

ACS Nano ◽  
2013 ◽  
Vol 7 (3) ◽  
pp. 2651-2658 ◽  
Author(s):  
Woon Ik Park ◽  
Byoung Kuk You ◽  
Beom Ho Mun ◽  
Hyeon Kook Seo ◽  
Jeong Yong Lee ◽  
...  
Keyword(s):  
Block Copolymer ◽  
Phase Change ◽  
Phase Change Memory ◽  
Power Reduction ◽  
Switching Power ◽  
Self Assembled ◽  
Change Memory

A SPICE model for a phase-change memory cell based on the analytical conductivity model

2012 ◽  
Vol 33 (11) ◽  
pp. 114004
Author(s):  
Yiqun Wei ◽  
Xinnan Lin ◽  
Yuchao Jia ◽  
Xiaole Cui ◽  
Jin He ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Conductivity Model ◽  
Spice Model ◽  
Change Memory

Simulation and Design of a Silicon Nanowire based Phase Change Memory Cell

2012 ◽  
Vol 1431 ◽  
Author(s):  
Ramin Banan Sadeghian ◽  
Yusuf Leblebici ◽  
Ali Shakouri
Keyword(s):  
Phase Change ◽  
High Speed ◽  
Low Cost ◽  
Silicon Nanowire ◽  
Phase Change Memory ◽  
Random Access ◽  
Memory Cell ◽  
Oxide Thickness ◽  
Nanowire Diameter ◽  
Change Memory

ABSTRACTIn this work we present preliminary calculations and simulations to demonstrate feasibility of programming a nanoscale Phase Change Random Access Memory (PCRAM) cell by means of a silicon nanowire ballistic transistor (SNWBT). Memory cells based on ballistic transistors bear the advantage of having a small size and high-speed operation with low power requirements. A one-dimensional MOSFET model (FETToy) was used to estimate the output current of the nanowire as a function of its diameter. The gate oxide thickness was 1.5 nm, and the Fermi level at source was set to -0.32 eV. For the case of VDS = VGS = 1 V, when the nanowire diameter was increased from 1 to 60 nm, the output power density dropped from 109 to 106 W cm-2 , while the current increased from 20 to 90 μA. Finite element electro-thermal analysis were carried out on a segmented cylindrical phase-change memory cell made of Ge2Sb2Te5 (GST) chalcogenide, connected in series to the SNWBT. The diameter of the combined device, d, and the aspect ratio of the GST region were selected so as to achieve optimum heating of the GST. With the assumption that the bulk thermal conductivity of GST does not change significantly at the nanoscale, it was shown that for d = 24 nm, a ‘reset’ programming current of ID = 80 μA can heat the GST up to its melting point. The results presented herein can help in the design of low cost, high speed, and radiation tolerant nanoscale PCRAM devices.

scholarly journals Plasmonic nanogap enhanced phase-change devices with dual electrical-optical functionality

2019 ◽  
Vol 5 (11) ◽  
pp. eaaw2687 ◽  
Author(s):  
Nikolaos Farmakidis ◽  
Nathan Youngblood ◽  
Xuan Li ◽  
James Tan ◽  
Jacob L. Swett ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Communications Technologies ◽  
New Strategy ◽  
On Chip ◽  
Processing And Storage ◽  
Electrical Signaling ◽  
And Storage ◽  
Change Memory

Modern-day computers rely on electrical signaling for the processing and storage of data, which is bandwidth-limited and power hungry. This fact has long been realized in the communications field, where optical signaling is the norm. However, exploiting optical signaling in computing will require new on-chip devices that work seamlessly in both electrical and optical domains, without the need for repeated electrical-to-optical conversion. Phase-change devices can, in principle, provide such dual electrical-optical operation, but assimilating both functionalities into a single device has so far proved elusive owing to conflicting requirements of size-limited electrical switching and diffraction-limited optical response. Here, we combine plasmonics, photonics, and electronics to deliver an integrated phase-change memory cell that can be electrically or optically switched between binary or multilevel states. Crucially, this device can also be simultaneously read out both optically and electrically, offering a new strategy for merging computing and communications technologies.

Phase Change Memory Cell Concepts and Designs

2009 ◽  
pp. 355-380 ◽  
Author(s):  
Roberto Bez ◽  
Robert J. Gleixner ◽  
Fabio Pellizzer ◽  
Agostino Pirovano ◽  
Greg Atwood
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Change Memory

Enhanced Thermal Efficiency in Phase-Change Memory Cell by Double GST Thermally Confined Structure

2007 ◽  
Vol 28 (10) ◽  
pp. 871-873 ◽  
Author(s):  
Der-Sheng Chao ◽  
Yi-Chan Chen ◽  
Fred Chen ◽  
Ming-Jung Chen ◽  
Philip H. Yen ◽  
...  
Keyword(s):  
Phase Change ◽  
Thermal Efficiency ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Confined Structure ◽  
Change Memory

Contact size scaling of a W-contact phase-change memory cell based on numerical simulation

2012 ◽  
Vol 33 (10) ◽  
pp. 104006
Author(s):  
Yiqun Wei ◽  
Xinnan Lin ◽  
Yuchao Jia ◽  
Xiaole Cui ◽  
Xing Zhang ◽  
...  
Keyword(s):  
Numerical Simulation ◽  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Contact Phase ◽  
Size Scaling ◽  
Contact Size ◽  
Change Memory
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