Charge Trapping Effects in High-k Transistors

2019 ◽  
Vol 1 (5) ◽  
pp. 663-670 ◽  
Author(s):  
Gennadi Bersuker ◽  
Johnny Sim ◽  
Chad Young ◽  
Rino Choi ◽  
C.S. Park ◽  
...  
2006 ◽  
Vol 27 (12) ◽  
pp. 984-987 ◽  
Author(s):  
Huang-Chun Wen ◽  
H. Rusty Harris ◽  
Chadwin D. Young ◽  
Hongfa Luan ◽  
Husam N. Alshareef ◽  
...  

Nanomaterials ◽  
2018 ◽  
Vol 8 (10) ◽  
pp. 799 ◽  
Author(s):  
Jer Wang ◽  
Chyuan Kao ◽  
Chien Wu ◽  
Chun Lin ◽  
Chih Lin

High-k material charge trapping nano-layers in flash memory applications have faster program/erase speeds and better data retention because of larger conduction band offsets and higher dielectric constants. In addition, Ti-doped high-k materials can improve memory device performance, such as leakage current reduction, k-value enhancement, and breakdown voltage increase. In this study, the structural and electrical properties of different annealing temperatures on the Nb2O5 and Ti-doped Nb2O5(TiNb2O7) materials used as charge-trapping nano-layers in metal-oxide-high k-oxide-semiconductor (MOHOS)-type memory were investigated using X-ray diffraction (XRD) and atomic force microscopy (AFM). Analysis of the C-V hysteresis curve shows that the flat-band shift (∆VFB) window of the TiNb2O7 charge-trapping nano-layer in a memory device can reach as high as 6.06 V. The larger memory window of the TiNb2O7 nano-layer is because of a better electrical and structural performance, compared to the Nb2O5 nano-layer.


1993 ◽  
Vol 93 (3-4) ◽  
pp. 399-404 ◽  
Author(s):  
Brian L. Dougherty ◽  
Blas Cabrera ◽  
Adrian T. Lee ◽  
Michael J. Penn ◽  
Betty A. Young

1998 ◽  
Vol 108 (12) ◽  
pp. 5027-5034 ◽  
Author(s):  
W. C. Simpson ◽  
T. M. Orlando ◽  
L. Parenteau ◽  
K. Nagesha ◽  
L. Sanche

Sign in / Sign up

Export Citation Format

Share Document