Nondestructive Thin Film Defect Analysis of Silicon‐on‐Insulator Layers Made by Zone‐Melt Recrystallization and Wafer Bonding

1990 ◽  
Vol 137 (12) ◽  
pp. 3975-3977
Author(s):  
M. J. J. Theunissen ◽  
A. H. Goemans ◽  
A. J. R. de Kock ◽  
J. Haisma ◽  
C. W. T. Bulle‐Lieuwma ◽  
...  
Keyword(s):  
Thin Film ◽  
Wafer Bonding ◽  
Silicon On Insulator ◽  
Defect Analysis ◽  
Insulator Layers ◽  
Film Defect ◽  
Zone Melt

Non-Destructive Assessment of Thin Film Stresses and Crystal Qualify of Silicon on Insulator Materials with Raman Spectroscopy

1990 ◽  
Vol 188 ◽  
Author(s):  
Ingrid De Wolf ◽  
Jan Vanhellemont ◽  
Herman E. Maes
Keyword(s):  
Thin Film ◽  
Electron Microscopy ◽  
Raman Spectroscopy ◽  
Cross Section ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Micro Raman Spectroscopy ◽  
Transmission Electron ◽  
Non Destructive ◽  
Zone Melt

ABSTRACTMicro Raman spectroscopy (RS) is used to study the crystalline quality and the stresses in the thin superficial silicon layer of Silicon-On-Insulator (SO) materials. Results are presented for SIMOX (Separation by IMplanted OXygen) and ZMR (Zone Melt Recrystallized) substrates. Both as implanted and annealed SIMOX structures are investigated. The results from the as implanted structures are correlated with spectroscopic ellipsometry (SE) and cross-section transmission electron microscopy (TEM) analyses on the same material. Residual stress in ZMR substrates is studied in low- and high temperature gradient regions.

scholarly journals Heterogeneous Wafer Bonding Technology and Thin-Film Transfer Technology-Enabling Platform for the Next Generation Applications beyond 5G

Micromachines ◽  
2021 ◽  
Vol 12 (8) ◽  
pp. 946
Author(s):  
Zhihao Ren ◽  
Jikai Xu ◽  
Xianhao Le ◽  
Chengkuo Lee
Keyword(s):  
Thin Film ◽  
Wafer Bonding ◽  
Composite Structures ◽  
High Speed ◽  
Silicon On Insulator ◽  
Wearable Electronics ◽  
Next Generation ◽  
Bonding Technology ◽  
Film Transfer ◽  
Bandgap Semiconductors

Wafer bonding technology is one of the most effective methods for high-quality thin-film transfer onto different substrates combined with ion implantation processes, laser irradiation, and the removal of the sacrificial layers. In this review, we systematically summarize and introduce applications of the thin films obtained by wafer bonding technology in the fields of electronics, optical devices, on-chip integrated mid-infrared sensors, and wearable sensors. The fabrication of silicon-on-insulator (SOI) wafers based on the Smart CutTM process, heterogeneous integrations of wide-bandgap semiconductors, infrared materials, and electro-optical crystals via wafer bonding technology for thin-film transfer are orderly presented. Furthermore, device design and fabrication progress based on the platforms mentioned above is highlighted in this work. They demonstrate that the transferred films can satisfy high-performance power electronics, molecular sensors, and high-speed modulators for the next generation applications beyond 5G. Moreover, flexible composite structures prepared by the wafer bonding and de-bonding methods towards wearable electronics are reported. Finally, the outlooks and conclusions about the further development of heterogeneous structures that need to be achieved by the wafer bonding technology are discussed.

scholarly journals Optimization of the Ion-Cut Process in Si and SiC

2000 ◽  
Vol 647 ◽  
Author(s):  
O. W. Holland ◽  
D. K. Thomas ◽  
R. B. Gregory
Keyword(s):  
Thin Film ◽  
Elevated Temperature ◽  
Ion Implantation ◽  
Wafer Bonding ◽  
Silicon On Insulator ◽  
Critical Dose ◽  
Wide Range ◽  
Temperature Irradiation ◽  
Film Separation

AbstractH+-implantation is the basis for an ion-cut process, which combines hydrophilic wafer bonding, to produce heterostructures over a wide range of materials. This process has been successfully applied in Si to produce a commercial silicon-on-insulator material. The efficacy of implantation to produce thin-film separation was studied by investigation of H+-induced exfoliation in Si and SiC. Experiments were done to isolate the effects of the hydrogen chemistry from that of implant damage. Damage is manipulated independently of H+ dosage by a variety of techniques ranging from elevated temperature irradiation to a two-step implantation scheme in Si, and the use of channeled-ion implantation in SiC. The results will demonstrate that such schemes can significantly reduce the critical dose for exfoliation.

Leakage current models of thin film silicon-on-insulator devices

1998 ◽  
Vol 72 (10) ◽  
pp. 1199-1201 ◽  
Author(s):  
Hank Shin ◽  
Stella Hong ◽  
Tom Wetteroth ◽  
Syd R. Wilson ◽  
Dieter K. Schroder
Keyword(s):  
Thin Film ◽  
Leakage Current ◽  
Silicon On Insulator ◽  
Thin Film Silicon

Thin-film InGaN∕GaN Vertical Light Emitting Diodes Using GaN on Silicon-On-Insulator Substrates

2011 ◽  
Vol 14 (11) ◽  
pp. H460 ◽  
Author(s):  
Surani Bin Dolmanan ◽  
Siew Lang Teo ◽  
Vivian Kaixin Lin ◽  
Hui Kim Hui ◽  
Armin Dadgar ◽  
...  
Keyword(s):  
Thin Film ◽  
Light Emitting Diodes ◽  
Silicon On Insulator ◽  
Light Emitting

STUDY OF ELECTRICAL CHARACTERISTIC FOR 50NM AND 10NM SOI BODY THICKNESS IN MOSFET DEVICE

2015 ◽  
Vol 77 (21) ◽  
Author(s):  
M.N.I.A Aziz ◽  
F. Salehuddin ◽  
A.S.M. Zain ◽  
K.E. Kaharudin
Keyword(s):  
Thin Film ◽  
Electrical Characteristic ◽  
Silicon On Insulator ◽  
Electrical Characteristics ◽  
Short Channel ◽  
Doping Density ◽  
Soi Mosfet ◽  
Buried Oxide ◽  
Soi Technology ◽  
Better Than

Silicon-on-insulator (SOI) technology is an effective approach of mitigating the short channel effect (SCE) problems. The SOI is believed to be capable of suppressing the SCE, thereby improving the overall electrical characteristics of MOSFET device. SCE in SOI MOSFET is heavily influenced by thin film thickness, thin-film doping density and buried oxide (BOX) thickness. This paper will analyze the effect of BOX towards SOI MOSFET device. The 50nm and 10nm thickness of buried oxide in SOI MOSFET was developed by using SILVACO TCAD tools, specifically known as Athena and Atlas modules. From the observation, the electrical characteristic of 100nm thickness is slightly better than 50nm and 10nm. It is observed that the value drive current of 10nm and 100nm thickness SOI MOSFET was 6.9% and 11% lower than 50nm respectively, but the overall 50nm is superior. However, the electrical characteristics of 10nm SOI MOSFET are still closer and within the range of ITRS 2013 prediction.

Silicon Wafer Bonding Mechanism for Silicon-on-Insulator Structures

1990 ◽  
Vol 29 (Part 2, No. 12) ◽  
pp. L2311-L2314 ◽  
Author(s):  
Takao Abe ◽  
Tokio Takei ◽  
Atsuo Uchiyama ◽  
Katsuo Yoshizawa ◽  
Yasuaki Nakazato
Keyword(s):  
Silicon Wafer ◽  
Wafer Bonding ◽  
Silicon On Insulator ◽  
Bonding Mechanism
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