Investigation of Thermal Removal of Native Oxide from Si (100) Surfaces in Hydrogen for Low‐Temperature Si CVD Epitaxy

1992 ◽  
Vol 139 (4) ◽  
pp. 1175-1180 ◽  
Author(s):  
Tatsuya Yamazaki ◽  
Noriyuki Miyata ◽  
Takayuki Aoyama ◽  
Takashi Ito
Keyword(s):  
1996 ◽  
Vol 03 (01) ◽  
pp. 1133-1136
Author(s):  
H. KASAHARA ◽  
T. SHIKATA ◽  
K. YAMAMOTO

We investigated electron transport in fine-particle films of Au prepared onto Si native oxide. Electron transport measurements and TEM observations were carried out for as-deposited and after thermal treatment of the films in air. We observed the anomalous resistance increases in as-deposited fine-particle films of Au and obtained α T =4.5. After 150°C thermal treatment in air, however, these anomalous resistance increases in the Au films disappeared and its topography appeared on the TEM images drastically changed into percolative structure. We found that the size of the Au fine particles causes anomalous resistance increase at low temperature.


2017 ◽  
Vol 122 ◽  
pp. 288-295 ◽  
Author(s):  
Mahnaz Shafiei ◽  
Faegheh Hoshyargar ◽  
Nunzio Motta ◽  
Anthony P. O'Mullane

1984 ◽  
Author(s):  
W. E. Stanchina ◽  
J. M. Whelan ◽  
K. Chalermtiragool

1991 ◽  
Vol 220 ◽  
Author(s):  
Juergen Ramm ◽  
Eugen Beck ◽  
Albert Zueger

ABSTRACTA basic process sequence for low temperature in-situ processing of metal-insulator-semiconductor (MIS) structures in an ultra-high vacuum (UHV) multichamber system is presented. It includes conditioning of the process chamber by plasma heating, in-situ cleaning of silicon wafers, and conventional silicon molecular beam epitaxy (Si-MBE). The in-situ cleaning is achieved by an argon/hydrogen plasma treatment of the wafer surface at temperatures well below 400° C. The native oxide as well as carbon compounds are removed from the silicon surface. Etch rates for SiO2 are determined for various plasma parameters. Without additional cleaning procedures, silicon films are deposited in another process step using a quadrupole mass spectrometer controlled electron beam evaporator. Epitaxial films are obtained for substrate temperatures as low as 500°C on (100) and 600°C on (111) silicon for deposition rates of 0.05 nm/s.


Author(s):  
Hiroki Saito ◽  
Hiroaki Ebihara ◽  
Yuji Ichikawa ◽  
Kazuhiro Ogawa

Abstract Low pressure cold spraying is an attractive technique for onsite metal coating fabrication due to its compactness and portability. However; the bonding strength of the coating prepared by low pressure cold spraying is generally low; which restricts the further applications in engineering and industrial fields. To improve the bonding strength; pre-treatment on substrate surface can be an effective procedure. In this study; a low-temperature plasma treatment was applied to a pretreatment technique; and the effect of the treatment on particle bonding was compared with that of a laser treatment. Copper coatings on aluminum and copper substrates were selected and studied as basic metal materials. The SEM observation results show that the particle adhesion rate significantly increases by the laser and plasma treatments; due to the removal of the native oxide films on the substrates. The particle bonding on the plasma-treated substrate reveals better interfacial adhesion with less gap compared with the laser-treated one. The pre-treatment by low-temperature plasma can be an attractive technique to assist the cold spraying process due to the oxide removal ability and no thermal effect which can apply a wide range of materials.


1992 ◽  
Vol 259 ◽  
Author(s):  
Jon T. Fitch ◽  
Dean J. Denning

ABSTRACTLow temperature (<850°C) defect free selective silicon epitaxy has been achieved with a conventional barrel type reactor (base pressure -10−4 Torr) using complementary cleaning and growth processes: a wet multi-step oxidizing clean, and a novel non-steady state CVD growth process. With this combination of cleaning and growth processes, it is shown that the need for a high temperature (950-1000°C) insitu native oxide removal step, which may be incompatible with advanced VLSI process integration, is eliminated.


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