The structure of SYSTEM/360, Part III: Processing unit design considerations

1964 ◽  
Vol 3 (2) ◽  
pp. 144-164 ◽  
Author(s):  
G. M. Amdahl
2012 ◽  
Vol 52 (2) ◽  
pp. 685
Author(s):  
Claude Cahuzac

What are the key design considerations driving the successful delivery of the world’s largest semi-submersible Central Processing Facility (CPF), to be installed at the Ichthys gas field in the Browse Basin, 200 km offshore North West Australia? Extreme cyclonic weather conditions, separating condensate from the gas stream, accommodating 150 personnel, and the sheer size of the gas processing unit at 110,000 tonnes, have created unprecedented challenges for the Ichthys design team. This extended abstract explores the design and planned construction of this massive piece of equipment. The CPF, measuring 110 m x 110 m, will be anchored to the seabed in about 250 m of water using 28 mooring chains. During the 40-year life of the project, the unit will collect gas from a network of up to 50 subsea production wells drilled into reservoirs 4,000–4,500 m beneath the seabed. From the CPF, condensate will be sent to a Floating Production Storage Offtake (FPSO) vessel moored nearby. The gas will be compressed and sent by an 885-km subsea pipeline to Darwin for processing into LNG, LPG and residual condensate. INPEX with its Ichthys joint venturer, Total, will be shipping 8.4 million tonnes of LNG and 1.6 million tonnes of LPG a year, as well as 100,000 barrels of condensate a day at peak. Successful delivery of the Ichthys Project will ensure INPEX achieves its goal of becoming the operator of a major LNG facility, while helping reach its target of producing 800,000 boe/d by 2020.


These works describe the implementation of a control unit which is an important part of Central Processing Unit (CPU) with the Field Programmable Gate Array (FPGA). In this work a frequency scaled and thermal aware energy-efficient control unit is designed with the help of 28 nanometer (nm) technology based FPGA. Frequency varies from 100MHz to 5GHz and the rise in frequency also gives rise in power consumption of control unit with FPGA. The thermal properties of FPGA also increase with increment in frequency. This whole experiment is done on Xilinx 14.1 ISE Design Suit and it is observed that lower the frequency, lower will be the power consumption of FPGA.


2012 ◽  
Author(s):  
Anna Maria Di Giorgio ◽  
Paolo Bastia ◽  
Scige J. Liu ◽  
Giovanni Giusi ◽  
Roberto Scaramella ◽  
...  

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1490 ◽  
Author(s):  
Luis Duarte ◽  
Rodolfo Gomes ◽  
Carlos Ribeiro ◽  
Rafael F. S. Caldeirinha

This paper reports on a complete end-to-end 5G mmWave testbed fully reconfigurable based on a FPGA architecture. The proposed system is composed of a baseband/low-IF processing unit, and a mmWave RF front-end at both TX/RX ends. In particular, the baseband unit design is based on a typical agile digital IF architecture, enabling on-the-fly modulations up to 256-QAM. The real-time 5G mmWave testbed, herein presented, adopts OFDM as the transmission scheme waveform, which was assessed OTA by considering the key performance indicators, namely EVM and BER. A detailed overview of system architecture is addressed together with the hardware considerations taken into account for the mmWave testbed development. Following this, it is demonstrated that the proposed testbed enables real-time multi-stream transmissions of UHD video content captured by nine individual cameras, which is in fact one of the killing applications for 5G.


Sign in / Sign up

Export Citation Format

Share Document