SiGe BiCMOS integrated circuits for high-speed serial communication links

2003 ◽  
Vol 47 (2.3) ◽  
pp. 259-282 ◽  
Author(s):  
D. J. Friedman ◽  
M. Meghelli ◽  
B. D. Parker ◽  
J. Yang ◽  
H. A. Ainspan ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Serial Communication ◽  
Communication Links ◽  
Sige Bicmos ◽  
Bicmos Integrated Circuits

ТИРИСТОРНЫЙ ЭФФЕКТ В СВЧ ИС, ИЗГОТОВЛЕННЫХ ПО SIGE БИКМОП-ТЕХНОЛОГИЯМ

2020 ◽  
Vol 96 (3s) ◽  
pp. 612-614
Author(s):  
В.В. Елесина ◽  
И.О. Метелкин
Keyword(s):  
Integrated Circuits ◽  
Extraction Procedure ◽  
Compact Model ◽  
Model Parameters ◽  
Cad Systems ◽  
Parameters Extraction ◽  
Sige Bicmos ◽  
Bicmos Integrated Circuits ◽  
Basic Parameters ◽  
Radiation Induced

Проведен анализ случаев возникновения тиристорного эффекта в СВЧ ИС, изготовленных по технологии SiGe БиКМОП, при воздействии ионизирующего излучения. Рассмотрены области СВЧ ИС, чувствительные к возникновению ТЭ, определены основные параметры тиристорных структур. Проведена апробация подхода к восстановлению параметров схемно-топологической радиационно-ориентированной модели тиристорной структуры для САПР. The paper analyzes ionizing radiation induced latchup in microwave SiGe BiCMOS integrated circuits (ICs). Critical parts of ICs sensitive to latchup have been identified and basic parameters of corresponding parasitic thyristor structures have been determined. An approach has been approved to the thyristor structure compact model parameters extraction procedure intended for use in CAD systems.

Nanoelectronics

2021 ◽  
pp. 20-35
Author(s):  
Jutika Devi ◽  
Pranayee Datta
Keyword(s):  
Integrated Circuits ◽  
Communication Networks ◽  
Communication Systems ◽  
High Speed ◽  
Building Blocks ◽  
Power Efficient ◽  
Fifth Generation ◽  
Communication Links ◽  
On Chip ◽  
Passive Circuit

The passive circuit elements resistor, inductor, and capacitor, which are the basic building blocks of an electronic circuit, need to be scaled down for application in fifth-generation wireless communication networks. Due to the growing demands in memory and computational capacities of integrated circuits along with high processing and transmission data speed for next-generation, microelectronics will be replaced by nanoelectronics in the future. The concept of nanoscale network on chip system is expected to play an important role in the field of communication systems for designing new devices of ultra-high speed for long and short-range communication links, power efficient computing devices, high-density memory and logic, and ultrafast interconnects. This chapter focuses on the mechanism of tailoring, patterning, and manipulating optical signals using nanometer-scale structures that may play the role of lumped nanocircuit elements at optical domain when selected properly with tremendous promise for application for fifth-generation communication systems.

scholarly journals A 112 Gb/s Radiation-Hardened Mid-Board Optical Transceiver in 130-nm SiGe BiCMOS for Intra-Satellite Links

2021 ◽  
Vol 9 ◽  
Author(s):  
Stavros Giannakopoulos ◽  
Ilias Sourikopoulos ◽  
Leontios Stampoulidis ◽  
Pylyp Ostrovskyy ◽  
Florian Teply ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Flip Chip ◽  
Cavity Surface ◽  
Sige Bicmos ◽  
Speed Performance ◽  
Vertical Cavity Surface ◽  
Transceiver Module ◽  
Radiation Hardened ◽  
Logic Cells

We report the design of a 112 Gb/s radiation-hardened (RH) optical transceiver applicable to intra-satellite optical interconnects. The transceiver chipset comprises a vertical-cavity surface-emitting laser (VCSEL) driver and transimpedance amplifier (TIA) integrated circuits (ICs) with four channels per die, which are adapted for a flip-chip assembly into a mid-board optics (MBO) optical transceiver module. The ICs are designed in the IHP 130 nm SiGe BiCMOS process (SG13RH) leveraging proven robustness in radiation environments and high-speed performance featuring bipolar transistors (HBTs) with fT/fMAX values of up to 250/340 GHz. Besides hardening by technology, radiation-hardened-by-design (RHBD) components are used, including enclosed layout transistors (ELTs) and digital logic cells. We report design features of the ICs and the module, and provide performance data from post-layout simulations. We present radiation evaluation data on analog devices and digital cells, which indicate that the transceiver ICs will reliably operate at typical total ionizing dose (TID) levels and single event latch-up thresholds found in geostationary satellites.

Microfabrication research at the National Submicron Facility

1983 ◽  
Vol 41 ◽  
pp. 86-89
Author(s):  
E.D. Wolf
Keyword(s):  
Integrated Circuits ◽  
Particle Physics ◽  
High Speed ◽  
New Technology ◽  
High Energy ◽  
High Energy Particle ◽  
New Science ◽  
Wide Range ◽  
Intermediate Domain ◽  
Circuit Function

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

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