A novel coarse-grain reconfigurable data-path for accelerating DSP kernels

Author(s):  
M. D. Galanis ◽  
G. Theodoridis ◽  
S. Tragoudas ◽  
D. Soudris ◽  
C. E. Goutis
Keyword(s):  
2005 ◽  
Vol 14 (04) ◽  
pp. 877-893 ◽  
Author(s):  
M. D. GALANIS ◽  
G. THEODORIDIS ◽  
S. TRAGOUDAS ◽  
C. E. GOUTIS

In this paper, a high-performance reconfigurable coarse-grain data-path, part of a hybrid reconfigurable platform, is introduced. The data-path consists of coarse-grain components that their flexibility and universality is shown to increase the system's performance due to significant reductions in latency. A methodology of unsophisticated but efficient algorithms for mapping computational intensive applications on the proposed data-path is also presented. Results on Digital Signal Processing and multimedia benchmarks show an average execution cycles reduction of 20%, combined with an area consumption decrease, when the proposed data-path is compared with a high-performance one. The average cycles reduction is even greater, 44%, when the comparison is held with a data-path that instantiates primitive computational resources on FPGA hardware.


2014 ◽  
Vol 1 ◽  
pp. 29-32
Author(s):  
Kazushige Nakamura ◽  
Kei Sumiyoshi ◽  
Noriko Hiroi ◽  
Akira Funahashi
Keyword(s):  

2016 ◽  
Vol 11 (1) ◽  
pp. 56 ◽  
Author(s):  
Yasir Amer Abbas ◽  
Razali Jidin ◽  
Norziana Jamil ◽  
Muhammad Reza Z'aba
Keyword(s):  

Sign in / Sign up

Export Citation Format

Share Document