Specifications for a design automation system

1965 ◽  
Author(s):  
R. Mandell ◽  
G. Estrin
Keyword(s):  
Design Automation ◽  
Automation System

scholarly journals TOPS: A Target-Oriented Partial Scan Design Package Based on Simulated Annealing

VLSI Design ◽  
1994 ◽  
Vol 2 (3) ◽  
pp. 233-239
Author(s):  
C. P. Ravikumar ◽  
H. Rasheed
Keyword(s):  
Simulated Annealing ◽  
Design Automation ◽  
Comparative Evaluation ◽  
Integrated Design ◽  
Automation System ◽  
Standard Cell ◽  
Scan Design ◽  
Partial Scan Design ◽  
Scan Path ◽  
Selection Of

In this paper, we describe algorithms based on Simulated Annealing for selecting a subset of flip-flops to be connected into a scan path. The objective for selection is to maximize the coverage of faults that are aborted by a sequential fault simulator. We pose the problem as a combinatorial optimization, and present a heuristic algorithm based on Simulated Annealing. The SCOAP testability measure is employed to assess the selection of flip-flops during the course of optimization. Our algorithms form a part of an integrated design package, TOPS, which has been designed as an enhancement to the OASIS standard-cell design automation system available from MCNC. We discuss the TOPS package and its performance on a number of ISCAS'89 benchmarks. We also present a comparative evaluation of the benchmark results.

A logic design automation system for generating logic diagram from hardware description

1989 ◽  
Vol 4 (3) ◽  
pp. 245-254
Author(s):  
Mingye Liu ◽  
Shuming Guo ◽  
Huai Yang ◽  
Liangyu Jia ◽  
Enyu Hong
Keyword(s):  
Design Automation ◽  
Automation System ◽  
Logic Design ◽  
Logic Diagram ◽  
Hardware Description
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