Improving the Performance of Hybrid Caches Using Partitioned Victim Caching

2021 ◽  
Vol 20 (1) ◽  
pp. 1-27
Author(s):  
Sukarn Agarwal ◽  
Hemangee K. Kapoor
Keyword(s):  
Hybrid Caches

scholarly journals Page Classifier and Placer: A Scheme of Managing Hybrid Caches

2014 ◽  
pp. 10-22
Author(s):  
Xin Yu ◽  
Xuanhua Shi ◽  
Hai Jin ◽  
Xiaofei Liao ◽  
Song Wu ◽  
...  
Keyword(s):  
Hybrid Caches

scholarly journals Exploiting Data Compression for Adaptive Block Placement in Hybrid Caches

Electronics ◽  
2022 ◽  
Vol 11 (2) ◽  
pp. 240
Author(s):  
Beomjun Kim ◽  
Yongtae Kim ◽  
Prashant Nair ◽  
Seokin Hong
Keyword(s):  
Random Access ◽  
Spin Transfer Torque ◽  
Main Memory ◽  
Spin Transfer ◽  
Access Memory ◽  
Low Leakage ◽  
Block Placement ◽  
On Chip ◽  
Hybrid Caches ◽  
Cache Block

STT-RAM (Spin-Transfer Torque Random Access Memory) appears to be a viable alternative to SRAM-based on-chip caches. Due to its high density and low leakage power, STT-RAM can be used to build massive capacity last-level caches (LLC). Unfortunately, STT-RAM has a much longer write latency and a much greater write energy than SRAM. Researchers developed hybrid caches made up of SRAM and STT-RAM regions to cope with these challenges. In order to store as many write-intensive blocks in the SRAM region as possible in hybrid caches, an intelligent block placement policy is essential. This paper proposes an adaptive block placement framework for hybrid caches that incorporates metadata embedding (ADAM). When a cache block is evicted from the LLC, ADAM embeds metadata (i.e., write intensity) into the block. Metadata embedded in the cache block are then extracted and used to determine the block’s write intensity when it is fetched from main memory. Our research demonstrates that ADAM can enhance performance by 26% (on average) when compared to a baseline block placement scheme.

AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches

2015 ◽  
Vol 14 (2) ◽  
pp. 115-118 ◽  
Author(s):  
Sparsh Mittal ◽  
Jeffrey S. Vetter
Keyword(s):  
Hybrid Caches
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