Effective exploitation of a zero overhead loop buffer

Proceedings of the ACM SIGPLAN 1999 workshop on Languages, compilers, and tools for embedded systems - LCTES '99 ◽

10.1145/314403.314419 ◽

1999 ◽

Cited By ~ 9

Author(s):

Gang-Ryung Uh ◽

Yuhong Wang ◽

David Whalley ◽

Sanjay Jinturkar ◽

Chris Burns ◽

...

Keyword(s):

Loop Buffer

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Power Improvement Using Block-Based Loop Buffer with Innermost Loop Control

Algorithms and Architectures for Parallel Processing - Lecture Notes in Computer Science ◽

10.1007/978-3-642-13136-3_38 ◽

2010 ◽

pp. 368-380

Author(s):

Ming-Yuan Zhong ◽

Jong-Jiann Shieh

Keyword(s):

Loop Control ◽

Loop Buffer ◽

Block Based

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An Efficient Buffering/Switching Technique based on Integrated NOLM and Loop Buffer for OBS Network

Journal of Optical Communications ◽

10.1515/joc.2007.28.3.212 ◽

2007 ◽

Vol 28 (3) ◽

Cited By ~ 1

Author(s):

M. F. Tang ◽

F. M. Abbou ◽

Nadir Hossain ◽

V. Mishra

Keyword(s):

Loop Buffer

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Performance Evaluation of a Hybrid Buffer-Based Optical Packet Switch Router

Journal of Optical Communications ◽

10.1515/joc-2019-0230 ◽

2020 ◽

Vol 0 (0) ◽

Author(s):

Vaibhav Shukla ◽

Nikunj Sharma ◽

Dilip Kumar Choubey

Keyword(s):

Data Communication ◽

Data Traffic ◽

Power Budget ◽

Correct Operation ◽

Switch Architecture ◽

Budget Analysis ◽

Optical Packet Switch ◽

Data Communication Network ◽

Packet Switch ◽

Loop Buffer

AbstractRecently, in the present day’s data center systems an explosive growth has been observed in data traffic, which restricts the speed of exiting data communication network. To solve such problem, fiber optical-based optical communication system is preferred choice. In this paper, an arrayed waveguide grating (AWG)-based optical packet switch is presented in which priority among packets is implemented effectively. This switch is a recirculating loop buffer-based switch in which a hybrid buffering (optical + electrical) technique is used for storing packets into the buffer. The power budget analysis of switch is presented in various conditions, when packet passes through the optical or electronic buffers. Comparison of optical and electronic buffering is done in terms of power required for the correct operation of the switch. In this paper, a comparison is performed between our proposed switch with recently published switch designs. The result presented in this paper clearly reveals that the performance of our proposed switch is far better than other previously published switch architecture. The major beauty of our proposed switch is that in this design priority among packets implemented effectively.

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