NoC-based fault-tolerant cache design in chip multiprocessors

Abbas Banaiyanmofrad; Gustavo Girão; Nikil Dutt

doi:10.1145/2567939

NoC-based fault-tolerant cache design in chip multiprocessors

ACM Transactions on Embedded Computing Systems ◽

10.1145/2567939 ◽

2014 ◽

Vol 13 (3s) ◽

pp. 1-26 ◽

Cited By ~ 2

Author(s):

Abbas Banaiyanmofrad ◽

Gustavo Girão ◽

Nikil Dutt

Keyword(s):

Chip Multiprocessors ◽

Fault Tolerant ◽

Cache Design

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NoC-aware cache design for multithreaded execution on tiled chip multiprocessors

Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers - HiPEAC '11 ◽

10.1145/1944862.1944891 ◽

2011 ◽

Cited By ~ 6

Author(s):

Ahmed K. Abousamra ◽

Alex K. Jones ◽

Rami G. Melhem

Keyword(s):

Chip Multiprocessors ◽

Cache Design

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Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors

2017 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2017.8016154 ◽

2017 ◽

Cited By ~ 2

Author(s):

Fatemeh Arezoomand ◽

Arghavan Asad ◽

Mahdi Fazeli ◽

Mahmood Fathy ◽

Farah Mohammadi

Keyword(s):

Chip Multiprocessors ◽

Energy Aware ◽

Cache Design ◽

Embedded Chip

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Adaptive execution assistance for multiplexed fault-tolerant chip multiprocessors

2011 IEEE 29th International Conference on Computer Design (ICCD) ◽

10.1109/iccd.2011.6081432 ◽

2011 ◽

Cited By ~ 1

Author(s):

Pramod Subramanyan ◽

Virendra Singh ◽

Kewal K. Saluja ◽

Erik Larsson

Keyword(s):

Chip Multiprocessors ◽

Fault Tolerant ◽

Adaptive Execution

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PS-cache: an energy-efficient cache design for chip multiprocessors

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618832 ◽

2013 ◽

Cited By ~ 1

Author(s):

Youngjoon Jo ◽

Michael Goldfarb ◽

Milind Kulkarni

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Cache Design

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An Efficient Lightweight Shared Cache Design for Chip Multiprocessors

Lecture Notes in Computer Science - Advanced Parallel Processing Technologies ◽

10.1007/978-3-642-03644-6_3 ◽

2009 ◽

pp. 28-40 ◽

Cited By ~ 2

Author(s):

Jinglei Wang ◽

Dongsheng Wang ◽

Yibo Xue ◽

Haixia Wang

Keyword(s):

Chip Multiprocessors ◽

Shared Cache ◽

Cache Design

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Location Cache Design and Performance Analysis for Chip Multiprocessors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2009.2028429 ◽

2011 ◽

Vol 19 (1) ◽

pp. 104-117 ◽

Cited By ~ 5

Author(s):

Jason Nemeth ◽

Rui Min ◽

Wen-Ben Jone ◽

Yiming Hu

Keyword(s):

Performance Analysis ◽

Chip Multiprocessors ◽

And Performance ◽

Cache Design

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Online task remapping strategies for fault-tolerant Network-on-Chip multiprocessors

Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip - NOCS '11 ◽

10.1145/1999946.1999967 ◽

2011 ◽

Cited By ~ 38

Author(s):

Onur Derin ◽

Deniz Kabakci ◽

Leandro Fiorin

Keyword(s):

Chip Multiprocessors ◽

Fault Tolerant ◽

Network On Chip ◽

On Chip

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ReMiT: Redundancy Migration for Latency Aware Fault Tolerant Cache Design in Multicore

2018 8th International Symposium on Embedded Computing and System Design (ISED) ◽

10.1109/ised.2018.8704108 ◽

2018 ◽

Author(s):

Avishek Choudhury ◽

Brototi Mondal ◽

Biplab K Sikdar

Keyword(s):

Fault Tolerant ◽

Cache Design

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NoC-aware cache design for chip multiprocessors

Proceedings of the 19th international conference on Parallel architectures and compilation techniques - PACT '10 ◽

10.1145/1854273.1854354 ◽

2010 ◽

Cited By ~ 2

Author(s):

Ahmed K. Abousamra ◽

Rami G. Melhem ◽

Alex K. Jones

Keyword(s):

Chip Multiprocessors ◽

Cache Design

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PS-Cache: an energy-efficient cache design for chip multiprocessors

The Journal of Supercomputing ◽

10.1007/s11227-014-1288-5 ◽

2014 ◽

Vol 71 (1) ◽

pp. 67-86 ◽

Cited By ~ 7

Author(s):

Joan J. Valls ◽

Alberto Ros ◽

Julio Sahuquillo ◽

Maria E. Gomez

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Cache Design

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