A case for NEMS-based functional-unit power gating of low-power embedded microprocessors

2011 ◽  
Author(s):  
Michael Henry ◽  
Meeta Srivastav ◽  
Leyla Nazhandali
Keyword(s):  
Low Power ◽  
Functional Unit ◽  
Power Gating ◽  
Unit Power

Integrating operation scheduling and binding for functional unit power-gating in high-level synthesis

Integration ◽  
2019 ◽  
Vol 65 ◽  
pp. 308-321
Author(s):  
Nan Wang ◽  
Song Chen ◽  
Zhiyuan Ma ◽  
Xiaofeng Ling ◽  
Yu Zhu
Keyword(s):  
Functional Unit ◽  
High Level Synthesis ◽  
Power Gating ◽  
Unit Power ◽  
High Level ◽  
Operation Scheduling

An integrated DFT solution for power reduction in scan test applications by low power gating scan cell

Integration ◽  
2017 ◽  
Vol 57 ◽  
pp. 108-124 ◽  
Author(s):  
Mahshid Mojtabavi Naeini ◽  
Sreedharan Baskara Dass ◽  
Chia Yee Ooi ◽  
Tomokazu Yoneda ◽  
Michiko Inoue
Keyword(s):  
Low Power ◽  
Power Reduction ◽  
Power Gating ◽  
Scan Test

Reducing Functional Unit Power Consumption and its Variation Using Leakage Sensors

2010 ◽  
Vol 18 (6) ◽  
pp. 988-997 ◽  
Author(s):  
Aviral Shrivastava ◽  
Deepa Kannan ◽  
Sarvesh Bhardwaj ◽  
Sarma Vrudhula
Keyword(s):  
Power Consumption ◽  
Functional Unit ◽  
Unit Power

New Low-leakage Flip-flops with Power-gating Scheme for Ultra-low Power Systems

2011 ◽  
Vol 10 (11) ◽  
pp. 2161-2167 ◽  
Author(s):  
Jianping Hu ◽  
Xiaoying Yu ◽  
Jindan Chen
Keyword(s):  
Power Systems ◽  
Low Power ◽  
Power Gating ◽  
Ultra Low Power ◽  
Low Leakage ◽  
Gating Scheme
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