Location and quantification of the interface defects in stressed LDD NMOSFETs using a combination of floating-gate and transconductance techniques, and charge-pumping methods

In sub-micrometre LDD NMOSFETs we were able to correlate an evolution of hot-carrier-induced gate currents obtained from floating-gate measurements with corresponding evolution of saturation transconductances. With this correlation, additional substrate current measurements, and the help of a 2D device simulation framework, we find that negative oxide-trapped charges of magnitude 2.5 × 1018 cm−3 are responsible for the experimental observations. This damage is located in the oxide at the edge of the gate over 100 Å (1 Å = 10−10 m) above the oxide–silicon interface, which is deep into the LDD structure and difficult to probe with the existing methods. Then we demonstrate how the in-channel interface states density can be profiled using a lateral-profiling charge-pumping technique. The coupling of the techniques mentioned above leads to the characterization of the entire oxide–silicon interface along the length of the gate. This is essential for the proper understanding of the directions for process improvements and the mechanisms of defect generation.