An ultra-low-power ambient light sensor for portable devices

2009 ◽  
Author(s):  
Soon-Ik Cho ◽  
Yun-Jeong Kim ◽  
Jong-Ho Lee ◽  
Kwang-Hyun Baek ◽  
Suki Kim
Keyword(s):  
Low Power ◽  
Portable Devices ◽  
Ambient Light ◽  
Ultra Low Power ◽  
Light Sensor

scholarly journals Betavoltaic performance under extreme temperatures

2016 ◽  
Vol 31 (4) ◽  
pp. 356-360 ◽  
Author(s):  
Tom Adams ◽  
Shripad Revankar ◽  
Peter Cabauy ◽  
Bret Elkind ◽  
Darrell Cheu
Keyword(s):  
Research And Development ◽  
Low Power ◽  
Wide Temperature Range ◽  
Open Circuit Voltage ◽  
Short Circuit ◽  
Open Circuit ◽  
Electrical Performance ◽  
Portable Devices ◽  
Ultra Low Power ◽  
Temperature Range

Longevity of sensors and portable devices is severely limited by temperature, chemical instability, and electrolyte leakage issues associated with conventional electrochemical batteries. Betavoltaics, which operate similar to photo voltaics, can operate in a wide temperature range safely without permanent degradation. Though not a new concept, which began in the 1950's and peaked in the mid 1970's, research has been minimal and sporadic until recent advancements in ultra-low power electronics and materialization of low power applications. The technology is rapidly maturing, generating research, and development in increasing the beta emitting source and semiconductor efficiencies. This study presents an update on betavoltaic technology, results from temperature evaluation on commercially available General Licensed betavoltaic cells, development of a hybrid system for latent and burst power, modeling and simulation techniques and results, and current and proposed research and development. Betavoltaic performance was successfully demonstrated for a wide temperature range (-30?C to 70?C). Short circuit current and open circuit voltage were used to compare electrical performance. Results indicate that the open-circuit voltage and maximum power decreased as temperature increased due to increases in the semiconductor's intrinsic carrier concentration.

scholarly journals Subthreshold Region based Linear Feedback Shift Register

2019 ◽  
Vol 8 (6S2) ◽  
pp. 817-821
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
System Level ◽  
Linear Feedback ◽  
Portable Devices ◽  
Subthreshold Region ◽  
Flip Flop ◽  
Ultra Low Power

Growing demand for portable devices and fast increases in complexity of chip cause power dissipation is an important parameter. Power consumption and dissipation or generations of more heat possess a restriction in the direction of the integration of more transistors. Several methods have been proposed to reduce power dissipation from system level to device level. Subthreshold circuits are widely used in more advanced applications due to ultra low-power consumption. The present work targets on construction of linear feedback shift registers (LFSR) in weak inversion region and their performance observed in terms of parameters like power delay product (PDP). In CMOS circuits subthreshold region of operation allows a low-power for ample utilizations but this advantage get with the penalty of flat speed. For the entrenched and high speed applications, improving the speed of subthreshold designs is essential. To enhance this, operate the devices at maximum current over capacitance. LFSR architectures build with various types of D flip flop and XOR gate circuits are analyzed. Circuit level Simulation is carried out using 130 nm technologies.

Low-power temperature-independent ambient light sensor

2011 ◽  
Vol 47 (17) ◽  
pp. 981 ◽  
Author(s):  
S.-I. Cho ◽  
J.-H. Park ◽  
S.-I. Lim ◽  
S. Kim ◽  
K.-H. Baek
Keyword(s):  
Low Power ◽  
Ambient Light ◽  
Light Sensor

scholarly journals Low voltage high speed 8T SRAM cell for ultra-low power applications

2018 ◽  
Vol 7 (3.29) ◽  
pp. 70
Author(s):  
A S. S. Trinadh Kumar ◽  
B V. V. Satyanarayana
Keyword(s):  
Low Power ◽  
High Speed ◽  
Low Voltage ◽  
Total Power ◽  
Portable Devices ◽  
Threshold Region ◽  
Ultra Low Power ◽  
Read Operation ◽  
Sram Cell ◽  
Total Power Consumption

The usage of portable devices increasing rapidly in the modern life has led us to focus our attention to increase the performance of the SRAM circuits, especially for low power applications. Basically in six-Transistor (6T) SRAM cell either read or write operation can be performed at a time whereas, in 7T SRAM cell using single ended write operation and single ended read operation both write and read operations will be accomplished simultaneously at a time respectively. When it comes to operate in sub threshold region, single ended read operation will be degraded severely and single ended write operation will be severely degraded in terms of write-ability at lower voltages. To encounter these complications, an eight transistor SRAM cell is proposed. It performs single ended read operation and single ended write operation together even at sub threshold region down to 0.1V with improved read-ability using read assist and improved dynamic write-ability which helps in reducing the consumption of power by attaining a lower data retention voltage point. To reduce the total power consumption in the circuits, two extra access transistors are used in 8T SRAM cell which also helps in reducing the overall delay.  

scholarly journals Time-Encoding-Based Ultra-Low Power Features Extraction Circuit for Speech Recognition Tasks

Electronics ◽  
2020 ◽  
Vol 9 (3) ◽  
pp. 418
Author(s):  
Eric Gutierrez ◽  
Carlos Perez ◽  
Fernando Hernandez ◽  
Luis Hernandez
Keyword(s):  
Feature Extraction ◽  
Speech Recognition ◽  
Power Consumption ◽  
Low Power ◽  
System Level ◽  
Portable Devices ◽  
Cmos Process ◽  
Ring Oscillators ◽  
Ultra Low Power ◽  
Band Pass

Current trends towards on-edge computing on smart portable devices requires ultra-low power circuits to be able to make feature extraction and classification tasks of patterns. This manuscript proposes a novel approach for feature extraction operations in speech recognition/voice activity detection tasks suitable for portable devices. Whereas conventional approaches are based on either completely analog or digital structures, we propose a “hybrid” approach by means of voltage-controlled-oscillators. Our proposal makes use of a bank a band-pass filters implemented with ring-oscillators to extract the features (energy within different frequency bands) of input audio signals and digitize them. Afterwards, these data will input a digital classification stage such as a neural network. Ring-oscillators are structures with a digital nature, which makes them highly scalable with the possibility of designing them with minimum length devices. Additionally, due to their inherent phase integration, low-frequency band-pass filters can be implemented without large capacitors. Consequently, we strongly benefit from power consumption and area savings. Finally, our proposal may incorporate the analog-to-digital converter into the structure of the own features extractor circuit to make the full conversion of the raw data when triggered. This supposes a unique advantage with respect to other approaches. The architecture is described and proposed at system-level, along with behavioral simulations made to check whether the performance is the expected one or not. Then the structure is designed with a 65-nm CMOS process to estimate the power consumption and area on a silicon implementation. The results show that our solution is very promising in terms of occupied area with a competitive power consumption in comparison to other state-of-the-art solutions.

Ultra-Low-Power Strategy for Reliable IoE Nanoscale Integrated Circuits

2019 ◽  
pp. 246-271 ◽  
Author(s):  
Jorge Semião ◽  
Ruben Cabral ◽  
Hugo Cavalaria ◽  
Marcelino Santos ◽  
Isabel C. Teixeira ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
Cmos Technology ◽  
Battery Life ◽  
Portable Devices ◽  
Transient Faults ◽  
Ultra Low Power ◽  
Power Strategies ◽  
Dynamic Voltage ◽  
Subthreshold Voltage

Ultra-low-power strategies have a huge importance in today's integrated circuits designed for internet of everything (IoE) applications, as all portable devices quest for the never-ending battery life. Dynamic voltage and frequency scaling techniques can be rewarding, and the drastic power savings obtained in subthreshold voltage operation makes this an important technique to be used in battery-operated devices. However, unpredictability in nanoscale chips is high, and working at reduced supply voltages makes circuits more vulnerable to operational-induced delay-faults and transient-faults. The goal is to implement an adaptive voltage scaling (AVS) strategy, which can work at subthreshold voltages to considerably reduce power consumption. The proposed strategy uses aging-aware local and global performance sensors to enhance reliability and fault-tolerance and allows circuits to be dynamically optimized during their lifetime while prevents error occurrence. Spice simulations in 65nm CMOS technology demonstrate the results.

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