A high-frequency divider in 0.18 µm SiGe BiCMOS technology

2006 ◽  
Author(s):  
Noorfazila Kamal ◽  
Yingbo Zhu ◽  
Leonard T. Hall ◽  
Said F. Al-Sarawi ◽  
Craig Burnet ◽  
...  
Keyword(s):  
High Frequency ◽  
Frequency Divider ◽  
Bicmos Technology ◽  
Sige Bicmos

A 70 GHz static dual-modulus frequency divider in SiGe BiCMOS technology

2015 ◽  
Author(s):  
Arzu Ergintav ◽  
Johannes Borngraber ◽  
Bernd Heinemann ◽  
Holger Rucker ◽  
Frank Herzel ◽  
...  
Keyword(s):  
Frequency Divider ◽  
Bicmos Technology ◽  
Sige Bicmos

scholarly journals An Integrated 5 GHz Wideband Quadrature Modem for OFDM Gbit/s Transmission in SiGe:C BiCMOS

2007 ◽  
Vol 2007 ◽  
pp. 1-8 ◽  
Author(s):  
Klaus Schmalz ◽  
Eckard Grass ◽  
Frank Herzel ◽  
Maxim Piz
Keyword(s):  
Phase Noise ◽  
Signal To Noise Ratio ◽  
Phase Locked Loop ◽  
Frequency Divider ◽  
Signal To Noise ◽  
Ofdm Signal ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
5 Ghz ◽  
Quadrature Signals

This paper presents a 5 GHz wideband I/Q modulator/demodulator for 650 MHz OFDM signal bandwidth, which is integrated with a 5 GHz phase locked loop for I/Q generation. The quadrature signals are derived from a 10 GHz CMOS VCO followed by a bipolar frequency divider. The phase noise at 1 MHz offset is −112 dBc/Hz for the modulator as well as for the demodulator. The chips were produced in a 0.25 μm SiGe BiCMOS technology. The signal-to-noise ratio (SNR) of transmitted/received OFDM signal and the corresponding I/Q mismatch versus baseband frequency are given. The modulator achieves an SNR of 22–23 dB, and the demodulator realizes an SNR up to 22 dB. The modulator reaches a data rate of 2.16 Gbit/s using 64 QAM OFDM, and the demodulator realizes 1.92 Gbits/s.

scholarly journals A Power Efficient Frequency Divider With 55 GHz Self-Oscillating Frequency in SiGe BiCMOS

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1968
Author(s):  
Francesco Centurelli ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Pasquale Tommasino ◽  
Alessandro Trifiletti
Keyword(s):  
High Efficiency ◽  
Current Mode ◽  
Frequency Divider ◽  
Input Frequency ◽  
Power Efficient ◽  
Current Mode Logic ◽  
Frequency Dividers ◽  
Bicmos Technology ◽  
Sige Bicmos

A power efficient static frequency divider in commercial 55 nm SiGe BiCMOS technology is reported. A standard Current Mode Logic (CML)-based architecture is adopted, and optimization of layout, biasing and transistor sizes allows achieving a maximum input frequency of 63 GHz and a self-oscillating frequency of 55 GHz, while consuming 23.7 mW from a 3 V supply. This results in high efficiency with respect to other static frequency dividers in BiCMOS technology presented in the literature. The divider topology does not use inductors, thus optimizing the area footprint: the divider core occupies 60 × 65 μm2 on silicon.

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