Influence of semiconductor manufacturing process variation on device parameter measurement for angular scatterometry

2006 ◽  
Author(s):  
Shih-Chun Wang ◽  
Yi-Sha Ku ◽  
Deh-Ming Shyu ◽  
Chun-Hung Ko ◽  
Nigel Smith
Keyword(s):  
Manufacturing Process ◽  
Semiconductor Manufacturing ◽  
Process Variation ◽  
Parameter Measurement ◽  
Device Parameter

NanoProbing on 7 nm FinFET Devices in an SRAM Array: Challenges and Solutions

2019 ◽  
Author(s):  
Anqi Qiu ◽  
William Lowe ◽  
Mridul Arora
Keyword(s):  
Manufacturing Process ◽  
Semiconductor Manufacturing

Abstract Nanoprobing systems have evolved to meet the challenges from recent innovations in the semiconductor manufacturing process. This is demonstrated through an exhibition of standard SRAM measurements on TSMC 7 nm FinFET technology. SEM based nanoprober is shown to meet or exceed the requirements for measuring 7nm technology and beyond. This paper discusses in detail of the best-known methods for nanoprobing on 7nm technology.

Quantifying Design and Manufacturing Robustness Through Stochastic Optimization Techniques

1996 ◽  
Author(s):  
David Kazmer ◽  
Philip Barkan ◽  
Kosuke Ishii
Keyword(s):  
Manufacturing Process ◽  
Process Variation ◽  
Optimization Techniques ◽  
Design Stage ◽  
Tool Geometry ◽  
Detailed Design ◽  
Process Dynamics ◽  
Molded Parts ◽  
Industry Practice ◽  
End Use

Abstract Critical design decisions are often made during the detailed design stage assuming known material and process behavior. However, in net shape manufacturing processes such as stamping, injection molding, and metals casting, the final part properties depend upon the specific tool geometry, material properties, and process dynamics encountered during production. As such, the end-use performance can not be accurately known in the detailed design stage. Moreover, slight random variations during manufacture can inadvertently result in inferior or unacceptable product performance and reduced production yields. These characteristics make it difficult for the designer to select the tooling, material, and processing details which will deliver the desired functional properties, let alone achieve a robust design which is tolerant to process variation. This paper describes a methodology for assessing the design/manufacturing robustness of candidate designs at the detailed design stage. In the design evaluation, the fundamental sources of variation are explicitly modeled and the effects conveyed through the manufacturing process to predict the distribution of end-use part properties. This is accomplished by utilizing optimization of manufacturing process variables within Monte Carlo simulation of stochastic process variation, which effectively parallels the industry practice of tuning and optimizing the process once the tool reaches the production floor. The resulting estimates can be used to evaluate the robustness of the candidate design relative to the product requirements and provide guidance for design and process modifications before tool steel is cut, as demonstrated by the application of the methodology for dimensional control of injection molded parts.

An empirical study-based state space model for multilayer overlay errors in the step-scan lithography process

RSC Advances ◽  
2015 ◽  
Vol 5 (126) ◽  
pp. 103901-103906 ◽  
Author(s):  
Fuyun He ◽  
Zhisheng Zhang
Keyword(s):  
Empirical Study ◽  
State Space ◽  
Integrated Circuit ◽  
Manufacturing Process ◽  
Semiconductor Manufacturing ◽  
State Space Model ◽  
Key Factors ◽  
Space Model ◽  
Lithography Process ◽  
Multistage Manufacturing

In semiconductor manufacturing, the multilayer overlay lithography process is a typical multistage manufacturing process; one of the key factors that restrict the reliability and yield of integrated circuit chips is overlay error between the layers.

Optimal Parameter Design in Flip Chip Micro-Machining Process for Solder Residue by Using Design of Experiments Approach

2010 ◽  
Vol 126-128 ◽  
pp. 867-872
Author(s):  
Jian Long Kuo ◽  
Chun Cheng Kuo
Keyword(s):  
Design Of Experiments ◽  
Manufacturing Process ◽  
Semiconductor Manufacturing ◽  
Flip Chip ◽  
Optimal Parameter ◽  
Optimal Solution ◽  
Machining Process ◽  
Passive Component ◽  
Quality Properties ◽  
Chip Quality

Since the solder residue is essential in the semiconductor manufacturing process, it has great impact on the flip chip quality considerably. This paper intends to improve the flip chip quality and try to obtain an optimal solution for the system parameters in the flip chip manufacturing process. The SMT manufacturing process is studied for discussion. The amount of solder and the size of solder are selected as the two quality properties. During the flux cleaning process, many solders are left on the passive component side. The balling might flow into the chip. It will cause the bump short in the chip which will affect the quality of the flip chip severely. In this paper, response surface method is adopted as the design of experiments. The objective function and subjective constrained conditions are defined to formulate the optimization problem. The confirmation experimental results are also provided to prove the validity. It is believed that the optimization results are helpful to the improvement of the semiconductor manufacturing process.

Sign in / Sign up

Export Citation Format

Share Document