A GmC filter design methodology for high-speed continuous-time sigma-delta A/D converters in a deep sub-micron technology

2005 ◽  
Author(s):  
Raf Schoofs ◽  
Michiel Steyaert ◽  
Willy Sansen
Keyword(s):  
Continuous Time ◽  
High Speed ◽  
Design Methodology ◽  
Filter Design ◽  
Sigma Delta

A Polyphase Filter Design for Continuous-Time Quadrature Bandpass Sigma–Delta Modulators

2008 ◽  
Vol 55 (11) ◽  
pp. 3457-3468 ◽  
Author(s):  
Song-Bok Kim ◽  
M. Robens ◽  
S. Joeres ◽  
R. Wunderlich ◽  
S. Heinen
Keyword(s):  
Continuous Time ◽  
Filter Design ◽  
Sigma Delta ◽  
Polyphase Filter ◽  
Sigma Delta Modulators

scholarly journals Low Power Continuous-Time Delta-Sigma Modulators Using the Three Stage OTA and Dynamic Comparator

2018 ◽  
Vol 7 (2.16) ◽  
pp. 38
Author(s):  
Anshu Gupta ◽  
Lalita Gupta ◽  
R K. Baghel
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Continuous Time ◽  
High Speed ◽  
Second Order ◽  
Cmos Process ◽  
Sigma Delta Modulator ◽  
Dynamic Comparator ◽  
Sigma Delta ◽  
Delta Sigma

A second-order sigma delta modulator that uses an operational transconductance amplifier as integrator and latch comparator as quantizer. The proposed technique where a low power high gain OTA is used as integrator and another circuit called dynamic latch comparator with two tail transistors and two controlling switches are used to achieve high speed, low power and high resolution in second order delta sigma modulator. It enhances the power efficiency and compactness of the modulator by implementing these blocks as sub modules. A second order modulator has been designed to justify the effectiveness of the proposed design. Technology 180nm CMOS process is used to implement complete second order continuous time sigma delta modulator.  We introduce the sub threshold three stage OTA, which is a way of achieving low distortion operation with input referred noise at 1 KHz is equal to the 2.2647pV/   and with low power consumption of 296.72nW.  A high-speed, low-voltage and a low-power Double-Tail dynamic comparator is also proposed. The proposed structure is contrasted with past dynamic comparators. In this paper, the comparator’s delay will be investigated and systematic analysis are inferred. a novel comparator using two tail transistor is proposed, here circuitry of a customized comparator having two tail is changed for low power dissipation and also it operates fast at little supply voltages. By maintaining the outline and by including couple of transistors, during the regeneration strengthening of positive feedback can be maintained, this results in amazingly diminished delay parameter. It is investigated that in proposed design structure of comparator using two tail transistors, power consumption is reduced and delay time is also diminished to a great extent. The proposed comparator is having maximum clock frequency that is possibly expanded up to 1GHz at voltages of 1 V whereas it is dissipating 10.99 µW of power, individually. By using sub threshold three stage OTA and dynamic standard two tail latch comparator, designed second order sigma delta ADC will consume 29.95µW of power.

scholarly journals Robust H∞ Loop Shaping Controller Synthesis for SISO Systems by Complex Modular Functions

2021 ◽  
Vol 26 (1) ◽  
pp. 21
Author(s):  
Ahmad Taher Azar ◽  
Fernando E. Serrano ◽  
Nashwa Ahmad Kamal
Keyword(s):  
Design Methodology ◽  
Closed Loop ◽  
Complex Analysis ◽  
Controller Design ◽  
Filter Design ◽  
Design Procedure ◽  
Elliptic Functions ◽  
Loop System ◽  
Closed Loop System ◽  
Loop Shaping

In this paper, a loop shaping controller design methodology for single input and a single output (SISO) system is proposed. The theoretical background for this approach is based on complex elliptic functions which allow a flexible design of a SISO controller considering that elliptic functions have a double periodicity. The gain and phase margins of the closed-loop system can be selected appropriately with this new loop shaping design procedure. The loop shaping design methodology consists of implementing suitable filters to obtain a desired frequency response of the closed-loop system by selecting appropriate poles and zeros by the Abel theorem that are fundamental in the theory of the elliptic functions. The elliptic function properties are implemented to facilitate the loop shaping controller design along with their fundamental background and contributions from the complex analysis that are very useful in the automatic control field. Finally, apart from the filter design, a PID controller loop shaping synthesis is proposed implementing a similar design procedure as the first part of this study.

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