A novel design-process optimization technique based on self-consistent electrical performance evaluation

2005 ◽  
Author(s):  
Valery Axelrad ◽  
Andrei Shibkov ◽  
Gene Hill ◽  
Hung-Jen Lin ◽  
Cyrus Tabery ◽  
...  
Keyword(s):  
Performance Evaluation ◽  
Process Optimization ◽  
Design Process ◽  
Optimization Technique ◽  
Electrical Performance ◽  
Self Consistent ◽  
Novel Design

scholarly journals CASE STUDY IN SYSTEMATIC DESIGN ENGINEERING – BOW THRUSTER COVERS

2012 ◽  
Author(s):  
W Ernst Eder
Keyword(s):  
Engineering Design ◽  
Design Process ◽  
Design Science ◽  
Process Engineering ◽  
Design Engineering ◽  
Learning Design ◽  
Systematic Design ◽  
Methodical Approach ◽  
Novel Design

Students learning design engineering at times need a good example of procedure for novel design engineering. The systematic heuristic-strategic use of a theory to guide the design process – Engineering Design Science – and the methodical design process followed in this case study is only necessary in limited situations. The full procedure should be learned, such that the student can select appropriate parts for other applications. Creativity is usually characterized by a wide search for solutions, especially those that are innovative. The search can be helped by this systematic and methodical approach. This case example is presented to show application of the recommended method, and the expected scope of the output, with emphasis on the stages of conceptualizing. The case follows a novel design problem of a mechanism to open and close the bow thruster covers for the Caravan Stage Barge.

Jaya Optimization Algorithm Implemented on A New Novel Design of 6-DOF AUV Body: A Case Study

2021 ◽  
Author(s):  
Noorulden Basil ◽  
Hamzah M. Marhoon ◽  
Ahmed R. Ibrahim
Keyword(s):  
Optimization Algorithm ◽  
Autonomous Underwater Vehicle ◽  
Optimization Technique ◽  
Pid Controllers ◽  
The Novel ◽  
Proportional Integral Derivative ◽  
New Novel ◽  
Novel Design ◽  
Optimum Output

Abstract The Novel Jaya Optimization Algorithm (JOA) was utilized in this research to evaluate the efficiency of a new novel design of Autonomous Underwater Vehicle (AUV). The Three Proportional Integral Derivative (PID) controllers were used to obtain the optimum output for the AUV Trajectory, which can be considered as a main side of the research for solving the AUV Performance. The optimization technique has been developed to solving the motion model of the AUV in order to reduce the rotations of trajectory for the AUV 6-DOF Body in the axis’s in x, y and z for the overall positions, velocity... etc., and to execute the optimum output for the dynamic kinematics model based on the Novel Euler-6 DOF AUV Body Equation implemented on MATLAB R2021a Version.

Thermal and Electrical Performance Evaluation and Design Optimization of Hybrid PV/T Systems

2021 ◽  
pp. 805-813
Author(s):  
Moustafa Al-Damook ◽  
Mansour Al Qubeissi ◽  
Zinedine Khatir ◽  
Darron Dixon-Hardy ◽  
Peter J. Heggs
Keyword(s):  
Performance Evaluation ◽  
Design Optimization ◽  
Electrical Performance

Multiphysics Performance Evaluation of Flexible Substrate Based 1.2kV SiC Half Bridge Intelligent Power Module with Stacked Dies

2017 ◽  
Vol 2017 (1) ◽  
pp. 000353-000359
Author(s):  
Xin Zhao ◽  
K. Jagannadham ◽  
Douglas C. Hopkins
Keyword(s):  
Performance Evaluation ◽  
Mechanical Design ◽  
Model Simulation ◽  
Flexible Substrate ◽  
Junction Temperature ◽  
Electrical Performance ◽  
Power Module ◽  
Parasitic Inductance ◽  
Regular Module ◽  
Intelligent Power Module

Abstract Wide Bandgap (WBG) power devices have become the most promising solution for power conversion systems, with the best trade-off between theoretical characteristics, real commercial availability and maturity of fabrications. Advanced packaging technology is being heavily developed to take full advantages of WBG devices, in terms of materials, mechanical design, fabrication and electrical performance optimizations. In this paper, a flexible substrate based 1.2kV SiC Half Bridge Intelligent Power Module with stacked dies is introduced. The module design is based on the concept “Power Supply in Package (PSiP)”, high functionality is integrated in the module. Together with power stages, gate driver circuits, Low Dropout Regulators (LDO), digital isolators, and bootstrap circuits are integrated in the module. An ultra-thin flexible epoxy-resin based dielectric is applied in the module as substrates, its thickness can be as low as 80μm, with 8W/mK thermal conductivity. The SiC switches are double-side solderable, with copper as topside metallization on pads. No bonding wires are applied in the SiC PSiP module. The highside and lowside SiC switches on the phase leg is stacked vertically for interconnections with low parasitic and high denstiy. This work mainly addresses performance evaluation of the PSiP SiC half bridge module by multiphysics simulations. Q3D is employed to evaluate the parasitic inductance and resistance in the module, showing that parasitic inductance is lower than 1.5nH in the design. The extracted parasitics is imported in spice circuit model, simulation results show limited ringing during switching transients. Thermal simulations are employed to compare junction temperature of power modules with DBC subtrates and flexible substrates, then to evaluate the thermal performance of the designed PSiP SiC model with stacked dies. It shows that junction temperature of designed IPM is higher than regular module at same condition. The paper also provides guideline for optimized heat sink design to lower junction temperature of the SiC IPM. Mechanical simulations are employed to evaluate the pre-stress induced in modules with DBC substrate and flexible dielectric substrate, and proves that mechanical stress induced by reflowing process can be reduced significantly by using ultra-thin flexible dielectric as substrate.

Chip Design Process Optimization Based on Design Quality Assessment

2010 ◽  
Author(s):  
Stefan Häusler ◽  
Jana Blaschke ◽  
Christian Sebeke ◽  
Wolfgang Rosenstiel ◽  
Axel Hahn ◽  
...  
Keyword(s):  
Quality Assessment ◽  
Process Optimization ◽  
Design Process ◽  
Design Quality ◽  
Chip Design
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