Application-specific low-power hybrid FPGA architecture design

2005 ◽  
Author(s):  
Ali Akoglu ◽  
Aravind Dasu ◽  
Sethuraman Panchanathan
2010 ◽  
Vol 63 (1) ◽  
pp. 165-176 ◽  
Author(s):  
Teemu Oskari Pitkänen ◽  
Jarmo Takala

Author(s):  
Ravi Khatwal ◽  
Manoj Kumar Jain

Recently Low power custom memory design is the major issue for embedded designer. Micro wind and Xilinx simulator performs efficient cache simulation and high performances with low power consumption. SRAM efficiency analyzed with 6-T architecture design and analyzed the simulation performance for specific application. We have implemented clock based memory architecture design and analyzed internal clock efficiency for SRAM. Architectural clock implemented memory design that reduces access time and propagation delay time for embedded devices. Internal semiconductor material improvement increases simulation performance and these design implemented for application specific design architecture.


2009 ◽  
Author(s):  
Fatemeh Eslami ◽  
Amirali Baniasadi ◽  
Mostafa Farahani

Sign in / Sign up

Export Citation Format

Share Document