Effect of line-edge roughness (LER) and line-width roughness (LWR) on sub-100-nm device performance

Author(s):  
Ji-Young Lee ◽  
Jangho Shin ◽  
Hyun-Woo Kim ◽  
Sang-Gyun Woo ◽  
Han-Ku Cho ◽  
...  
Electronics ◽  
2021 ◽  
Vol 10 (16) ◽  
pp. 1899
Author(s):  
Yejoo Choi ◽  
Jinwoong Lee ◽  
Jaehyuk Lim ◽  
Seungjun Moon ◽  
Changhwan Shin

In this study, the impact of the negative capacitance (NC) effect on process-induced variations, such as work function variation (WFV), random dopant fluctuation (RDF), and line edge roughness (LER), was investigated and compared to those of the baseline junctionless nanowire FET (JL-NWFET) in both linear (Vds = 0.05 V) and saturation (Vds = 0.5 V) modes. Sentaurus TCAD and MATLAB were used for the simulation of the baseline JL-NWFET and negative capacitance JL-NWFET (NC-JL-NWFET). Owing to the NC effect, the NC-JL-NWFET showed less variation in terms of device performance, such as σ[Vt], σ[SS], σ[Ion/Ioff], σ[Vt]/µ[Vt], σ[SS]/µ[SS], and σ[Ion/Ioff]/µ[Ion/Ioff], and enhanced device performance, which implies that the NC effect can successfully control the variation-induced degradation.


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